ti_hecc.h
1.42 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
#ifndef _CAN_PLATFORM_TI_HECC_H
#define _CAN_PLATFORM_TI_HECC_H
/*
* TI HECC (High End CAN Controller) driver platform header
*
* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed as is WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
/**
* struct hecc_platform_data - HECC Platform Data
*
* @scc_hecc_offset: mostly 0 - should really never change
* @scc_ram_offset: SCC RAM offset
* @hecc_ram_offset: HECC RAM offset
* @mbx_offset: Mailbox RAM offset
* @int_line: Interrupt line to use - 0 or 1
* @version: version for future use
* @transceiver_switch: platform specific callback fn for transceiver control
*
* Platform data structure to get all platform specific settings.
* this structure also accounts the fact that the IP may have different
* RAM and mailbox offsets for different SOC's
*/
struct ti_hecc_platform_data {
u32 scc_hecc_offset;
u32 scc_ram_offset;
u32 hecc_ram_offset;
u32 mbx_offset;
u32 int_line;
u32 version;
void (*transceiver_switch) (int);
};
#endif /* !_CAN_PLATFORM_TI_HECC_H */