The 2 important dipswitches are configured as shown below:

SW1 (for 33MHz SysClk)
----------------------
S1 S2 S3 S4 S5 S6 S7 S8
OFF OFF OFF OFF OFF OFF OFF ON

SW7 (for Op-Code Flash and Boot Option H)
-----------------------------------------
S1 S2 S3 S4 S5 S6 S7 S8
OFF OFF OFF ON OFF OFF OFF OFF

The EEPROM at location 0x52 is loaded with these 16 bytes:
C47042A6 05D7A190 40082350 0d050000

SDR0_SDSTP0[ENG]: 1 : PLL's VCO is the source for PLL forward divisors
SDR0_SDSTP0[SRC]: 1 : Feedback originates from PLLOUTB
SDR0_SDSTP0[SEL]: 0 : Feedback selection is PLL output
SDR0_SDSTP0[TUNE]: 1000111000 : 10 < VCO . Thanks a lot.

2007-08-06, Stefan Roese
---------------------------------------------------------------------

The configuration for the AMCC 440EP eval board "Bamboo" was changed
to only use 384 kbytes of FLASH for the U-Boot image. This way the
redundant environment can be saved in the remaining 2 sectors of the
same flash chip.

Caution: With an upgrade from an earlier U-Boot version the current
environment will be erased since the environment is now saved in
different sectors. By using the following command the environment can
be saved after upgrading the U-Boot image and *before* resetting the
board:

setenv recover_env 'prot off FFF80000 FFF9FFFF;era FFF80000 FFF9FFFF;' \
'cp.b FFF60000 FFF80000 20000'

2006-07-27, Stefan Roese