Commit 5a693527aab175e9e567d130f0090d7e0728b019

Authored by 장형기
1 parent d14b40250a
Exists in master and in 2 other branches fhd, fhd-demo

kernel dtb 수정

bootloader/u-boot_2015_04/include/configs/mx6s_prime_oven.h
@@ -183,9 +183,9 @@ @@ -183,9 +183,9 @@
183 "loadaddr=0x12000000\0" \ 183 "loadaddr=0x12000000\0" \
184 "boot_fdt=try\0" \ 184 "boot_fdt=try\0" \
185 "bootdelay=1\0" \ 185 "bootdelay=1\0" \
186 - "bootargs=console=ttymxc0,115200 root=/dev/ram0 rw --no-log initrd=0x1E000000,32M ramdisk=65536 video=${video_lvds} ${video_vmalloc} ${arg_option} autosh=${autoexec}\0" \  
187 - "bootargs_ram=setenv bootargs console=ttymxc0,115200 root=/dev/ram0 rw --no-log initrd=0x1E000000,32M ramdisk=65536 ${video_lvds} ${video_vmalloc} ${arg_option} autosh=${autoexec}\0" \  
188 - "bootargs_mmc=setenv bootargs console=ttymxc0,115200 root=/dev/mmcblk3p2 rw --no-log rootfstype=ext4 rootdelay=5 rootwait ${video_lvds} ${video_vmalloc} ${arg_option} autosh=${autoexec}\0" \ 186 + "bootargs=console=ttymxc0,115200 root=/dev/ram0 rw --no-log initrd=0x1E000000,32M ramdisk=65536 video=${video_lvds} ${video_vmalloc} ${arg_option} autorun=${autoexec}\0" \
  187 + "bootargs_ram=setenv bootargs console=ttymxc0,115200 root=/dev/ram0 rw --no-log initrd=0x1E000000,32M ramdisk=65536 ${video_lvds} ${video_vmalloc} ${arg_option} autorun=${autoexec}\0" \
  188 + "bootargs_mmc=setenv bootargs console=ttymxc0,115200 root=/dev/mmcblk3p2 rw --no-log rootfstype=ext4 rootdelay=5 rootwait ${video_lvds} ${video_vmalloc} ${arg_option} autorun=${autoexec}\0" \
189 "ethaddr=00:FA:15:12:02:02\0" \ 189 "ethaddr=00:FA:15:12:02:02\0" \
190 "eth1addr=00:FA:15:12:02:04\0" \ 190 "eth1addr=00:FA:15:12:02:04\0" \
191 "serverip=192.168.10.131\0" \ 191 "serverip=192.168.10.131\0" \
@@ -195,11 +195,11 @@ @@ -195,11 +195,11 @@
195 "ip_dyn=yes\0" \ 195 "ip_dyn=yes\0" \
196 "video_lvds=video=mxcfb0:dev=ldb,LDB-LP133WD2,if=RGB24 ldb=spl0\0" \ 196 "video_lvds=video=mxcfb0:dev=ldb,LDB-LP133WD2,if=RGB24 ldb=spl0\0" \
197 "video_vmalloc=fbmem=192M vmalloc=400M\0" \ 197 "video_vmalloc=fbmem=192M vmalloc=400M\0" \
198 - "arg_option=loglevel=7\0" \" \ 198 + "arg_option=loglevel=7 eth0ip=${ipaddr} eth0netmask=${netmask} eth0gw=${gatewayip}\0" \" \
199 "mmcdev=0\0" \ 199 "mmcdev=0\0" \
200 "tftpbase=prime-oven\0" \ 200 "tftpbase=prime-oven\0" \
201 "uboot_file=u-boot.imx\0" \ 201 "uboot_file=u-boot.imx\0" \
202 - "dtb_file=imx6sl-prime-oven.dtb-prime-oven.dtb\0" \" \ 202 + "dtb_file=imx6s-prime-oven.dtb-prime-oven.dtb\0" \" \
203 "kernel_file=uImage\0" \ 203 "kernel_file=uImage\0" \
204 "ramdisk_file=ramdisk.imx6-2.0-64M.gz\0" \ 204 "ramdisk_file=ramdisk.imx6-2.0-64M.gz\0" \
205 "uboot=tftpboot 0x12000000 ${tftpbase}/${uboot_file}; mmc dev ${mmcdev}; mmc write 0x12000000 2 500; if ext4ls mmc ${mmcdev}:1 boot; then ext4writ mmc ${mmcdev}:1 0x12000000 /boot/${uboot_file} ${filesize}; fi;\0" \ 205 "uboot=tftpboot 0x12000000 ${tftpbase}/${uboot_file}; mmc dev ${mmcdev}; mmc write 0x12000000 2 500; if ext4ls mmc ${mmcdev}:1 boot; then ext4writ mmc ${mmcdev}:1 0x12000000 /boot/${uboot_file} ${filesize}; fi;\0" \
buildroot/buildroot-2016.08.1/board/falinux/common/rootfs_overlay/etc/init.d/S82autoexec
@@ -2,8 +2,8 @@ @@ -2,8 +2,8 @@
2 2
3 start() { 3 start() {
4 ## APP auto run 4 ## APP auto run
5 - EXEC=$(cmd_parsing exec $CMDLINE)  
6 - if [ "$EXEC" != "" ]; then 5 + EXEC_AUTO_SH=$(cmd_parsing autorun $CMDLINE)
  6 + if [ "$EXEC_AUTO_SH" != "" ]; then
7 7
8 for A in 1 2 3 4 5; do 8 for A in 1 2 3 4 5; do
9 9
kernel/linux-imx6_3.14.28/arch/arm/boot/dts/Makefile
@@ -179,7 +179,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ @@ -179,7 +179,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
179 imx6dl-sp.dtb \ 179 imx6dl-sp.dtb \
180 imx6dl-wandboard.dtb \ 180 imx6dl-wandboard.dtb \
181 imx6dl-cmf.dtb \ 181 imx6dl-cmf.dtb \
182 - imx6sl-prime-qt5.dtb \ 182 + imx6s-prime-oven.dtb \
183 imx6q-arm2.dtb \ 183 imx6q-arm2.dtb \
184 imx6q-bt.dtb \ 184 imx6q-bt.dtb \
185 imx6q-bt2.dtb \ 185 imx6q-bt2.dtb \
kernel/linux-imx6_3.14.28/arch/arm/boot/dts/imx6qdl-cmf.dtsi
@@ -236,8 +236,8 @@ @@ -236,8 +236,8 @@
236 236
237 / { 237 / {
238 aliases { 238 aliases {
239 - mmc0 = &usdhc3;  
240 - mmc1 = &usdhc4; 239 + mmc2 = &usdhc3;
  240 + mmc3 = &usdhc4;
241 mxcfb0 = &mxcfb1; 241 mxcfb0 = &mxcfb1;
242 mxcfb1 = &mxcfb2; 242 mxcfb1 = &mxcfb2;
243 }; 243 };
kernel/linux-imx6_3.14.28/arch/arm/boot/dts/imx6qdl-prime-oven.dtsi
@@ -16,12 +16,12 @@ @@ -16,12 +16,12 @@
16 pinctrl-names = "default"; 16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_hog>; 17 pinctrl-0 = <&pinctrl_hog>;
18 18
19 - iomuxc_imx6q_cmf1000: iomuxc-imx6q-cmf1000grp { 19 + iomuxc_imx6q_primeoven: iomuxc-imx6q-primeovengrp {
20 status = "okay"; 20 status = "okay";
21 }; 21 };
22 }; 22 };
23 23
24 -&iomuxc_imx6q_cmf1000 { 24 +&iomuxc_imx6q_primeoven {
25 pinctrl_audmux: audmuxgrp { 25 pinctrl_audmux: audmuxgrp {
26 fsl,pins = < 26 fsl,pins = <
27 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 27 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
@@ -33,21 +33,10 @@ @@ -33,21 +33,10 @@
33 33
34 pinctrl_ecspi1: ecspi1grp { 34 pinctrl_ecspi1: ecspi1grp {
35 fsl,pins = < 35 fsl,pins = <
36 - MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1  
37 - MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1  
38 - MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x000b1  
39 -#define GP_ECSPI1_CS <&gpio3 19 GPIO_ACTIVE_LOW>  
40 - MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x0b0b1  
41 - >;  
42 - };  
43 -  
44 - pinctrl_ecspi2: ecspi2grp {  
45 - fsl,pins = <  
46 - MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1  
47 - MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1  
48 - MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x000b1  
49 -#define GP_ECSPI2_CS <&gpio5 12 GPIO_ACTIVE_LOW>  
50 - MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0b0b1 36 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 /* MISO */
  37 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 /* MOSI */
  38 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x000b1 /* SLCK */
  39 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x0b0b1 /* SS1 */
51 >; 40 >;
52 }; 41 };
53 42
@@ -69,34 +58,31 @@ @@ -69,34 +58,31 @@
69 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 58 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
70 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 59 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
71 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 60 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
72 -#define GP_ENET_PHY_RESET <&gpio1 25 GPIO_ACTIVE_LOW>  
73 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x0f0b0 /* ethernet phy reset */ 61 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x0f0b0 /* ethernet phy reset */
74 -#define GPIRQ_ENET_PHY <&gpio1 26 IRQ_TYPE_LEVEL_LOW>  
75 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b0 /* ethernet phy interrupt */ 62 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b0 /* ethernet phy interrupt */
76 >; 63 >;
77 }; 64 };
78 65
79 pinctrl_gpio_leds: gpio-ledsgrp { 66 pinctrl_gpio_leds: gpio-ledsgrp {
80 fsl,pins = < 67 fsl,pins = <
81 -#define GP_CPU_LED1 <&gpio1 2 GPIO_ACTIVE_HIGH>  
82 - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0  
83 -#define GP_CPU_LED2 <&gpio2 4 GPIO_ACTIVE_HIGH>  
84 - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 68 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 /* CPU-RUN */
  69 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CPU-ERROR */
85 >; 70 >;
86 }; 71 };
87 72
88 - pinctrl_hdmi_cec: hdmi_cecgrp { 73 + pinctrl_hog: hoggrp {
89 fsl,pins = < 74 fsl,pins = <
90 - MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 75 + MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 /* LCD Power Enable */
91 >; 76 >;
92 - }; 77 + };
93 78
94 - pinctrl_hog: hoggrp { 79 + pinctrl_pwm1: pwm1grp {
95 fsl,pins = < 80 fsl,pins = <
96 - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 /* LCD Power Enable */ 81 + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 /* LCD Backlight */
97 >; 82 >;
98 }; 83 };
99 84
  85 +
100 pinctrl_i2c1: i2c1grp { 86 pinctrl_i2c1: i2c1grp {
101 fsl,pins = < 87 fsl,pins = <
102 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 88 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
@@ -117,46 +103,16 @@ @@ -117,46 +103,16 @@
117 >; 103 >;
118 }; 104 };
119 105
120 - pinctrl_i2c2_max1180: i2c2-max1180grp { 106 + pinctrl_i2c2_tsc2007: i2c2-tsc2007grp {
121 fsl,pins = < 107 fsl,pins = <
122 -#define GPIRQ_MAX1180 <&gpio6 9 IRQ_TYPE_EDGE_FALLING>  
123 - MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0 /* max1180 interrupt */ 108 + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0 /* tsc2007 interrupt */
124 >; 109 >;
125 }; 110 };
126 111
127 pinctrl_i2c3: i2c3grp { 112 pinctrl_i2c3: i2c3grp {
128 fsl,pins = < 113 fsl,pins = <
129 - MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1  
130 - MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1  
131 - >;  
132 - };  
133 -  
134 - pinctrl_pwm1: pwm1grp {  
135 - fsl,pins = <  
136 - MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1  
137 - >;  
138 - };  
139 -  
140 - pinctrl_pcie: pciegrp {  
141 - fsl,pins = <  
142 -#define GP_PCIE_RESET <&gpio6 11 GPIO_ACTIVE_HIGH> /* GPIO_ACTIVE_HIGH 0, GPIO_ACTIVE_LOW 1 */  
143 - MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x000b0 /* PCIe Reset */  
144 -#define GP_PCIE_WAKE <&gpio6 14 GPIO_ACTIVE_HIGH> /* GPIO_ACTIVE_HIGH 0, GPIO_ACTIVE_LOW 1 */  
145 - MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x000b0 /* PCIe Wake */  
146 - >;  
147 - };  
148 -  
149 - pinctrl_reg_usbotg_vbus: reg-usbotg-vbusgrp {  
150 - fsl,pins = <  
151 -#define GP_REG_USBOTG <&gpio3 22 GPIO_ACTIVE_HIGH>  
152 - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x030b0  
153 - >;  
154 - };  
155 -  
156 - pinctrl_reg_wlan_en: reg-wlan-engrp {  
157 - fsl,pins = <  
158 -#define GP_REG_WLAN_EN <&gpio6 15 GPIO_ACTIVE_HIGH>  
159 - MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x030b0 114 + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  115 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
160 >; 116 >;
161 }; 117 };
162 118
@@ -178,8 +134,6 @@ @@ -178,8 +134,6 @@
178 fsl,pins = < 134 fsl,pins = <
179 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 135 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
180 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 136 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
181 - MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1  
182 - MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1  
183 >; 137 >;
184 }; 138 };
185 139
@@ -190,16 +144,9 @@ @@ -190,16 +144,9 @@
190 >; 144 >;
191 }; 145 };
192 146
193 - pinctrl_usbh1: usbh1grp {  
194 - fsl,pins = <  
195 -#define GP_USBH1_HUB_RESET <&gpio7 12 GPIO_ACTIVE_LOW>  
196 - MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x0b0b0  
197 - >;  
198 - };  
199 -  
200 pinctrl_usbotg: usbotggrp { 147 pinctrl_usbotg: usbotggrp {
201 fsl,pins = < 148 fsl,pins = <
202 - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 149 + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
203 >; 150 >;
204 }; 151 };
205 152
@@ -211,9 +158,7 @@ @@ -211,9 +158,7 @@
211 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 158 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
212 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 159 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
213 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 160 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
214 -#define GP_USDHC3_CD <&gpio7 0 GPIO_ACTIVE_LOW>  
215 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 161 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
216 -#define GP_USDHC3_WP <&gpio7 1 GPIO_ACTIVE_LOW>  
217 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 162 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0
218 >; 163 >;
219 }; 164 };
@@ -236,10 +181,9 @@ @@ -236,10 +181,9 @@
236 181
237 / { 182 / {
238 aliases { 183 aliases {
239 - mmc0 = &usdhc3;  
240 - mmc1 = &usdhc4; 184 + mmc2 = &usdhc3;
  185 + mmc3 = &usdhc4;
241 mxcfb0 = &mxcfb1; 186 mxcfb0 = &mxcfb1;
242 - mxcfb1 = &mxcfb2;  
243 }; 187 };
244 188
245 clocks { 189 clocks {
@@ -251,7 +195,7 @@ @@ -251,7 +195,7 @@
251 }; 195 };
252 196
253 memory { 197 memory {
254 - reg = <0x10000000 0x40000000>; 198 + reg = <0x10000000 0x40000000>; /* 1GByte */
255 }; 199 };
256 200
257 leds { 201 leds {
@@ -259,15 +203,15 @@ @@ -259,15 +203,15 @@
259 pinctrl-names = "default"; 203 pinctrl-names = "default";
260 pinctrl-0 = <&pinctrl_gpio_leds>; 204 pinctrl-0 = <&pinctrl_gpio_leds>;
261 205
262 - cpu-led1 {  
263 - label = "cpu-led1";  
264 - gpios = GP_CPU_LED1;  
265 - linux,default-trigger = "time"; 206 + cpu-run {
  207 + label = "cpu-run";
  208 + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  209 + linux,default-trigger = "timer";
266 retain-state-suspended; 210 retain-state-suspended;
267 }; 211 };
268 - cpu-led2 {  
269 - label = "cpu-led2";  
270 - gpios = GP_CPU_LED2; 212 + cpu-error {
  213 + label = "cpu-error";
  214 + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
271 linux,default-trigger = "none"; 215 linux,default-trigger = "none";
272 retain-state-suspended; 216 retain-state-suspended;
273 }; 217 };
@@ -278,12 +222,12 @@ @@ -278,12 +222,12 @@
278 #address-cells = <1>; 222 #address-cells = <1>;
279 #size-cells = <0>; 223 #size-cells = <0>;
280 224
281 - reg_1p8v: regulator@0 { 225 + reg_1p2v: regulator@0 {
282 compatible = "regulator-fixed"; 226 compatible = "regulator-fixed";
283 reg = <0>; 227 reg = <0>;
284 - regulator-name = "1P8V";  
285 - regulator-min-microvolt = <1800000>;  
286 - regulator-max-microvolt = <1800000>; 228 + regulator-name = "1P2V";
  229 + regulator-min-microvolt = <1200000>;
  230 + regulator-max-microvolt = <1200000>;
287 regulator-always-on; 231 regulator-always-on;
288 }; 232 };
289 233
@@ -309,11 +253,9 @@ @@ -309,11 +253,9 @@
309 compatible = "regulator-fixed"; 253 compatible = "regulator-fixed";
310 reg = <3>; 254 reg = <3>;
311 pinctrl-names = "default"; 255 pinctrl-names = "default";
312 - pinctrl-0 = <&pinctrl_reg_usbotg_vbus>;  
313 regulator-name = "usb_otg_vbus"; 256 regulator-name = "usb_otg_vbus";
314 regulator-min-microvolt = <5000000>; 257 regulator-min-microvolt = <5000000>;
315 regulator-max-microvolt = <5000000>; 258 regulator-max-microvolt = <5000000>;
316 - gpio = GP_REG_USBOTG;  
317 enable-active-high; 259 enable-active-high;
318 }; 260 };
319 }; 261 };
@@ -332,29 +274,11 @@ @@ -332,29 +274,11 @@
332 mux-ext-port = <3>; 274 mux-ext-port = <3>;
333 }; 275 };
334 276
335 - sound-hdmi {  
336 - compatible = "fsl,imx6q-audio-hdmi",  
337 - "fsl,imx-audio-hdmi";  
338 - model = "imx-audio-hdmi";  
339 - hdmi-controller = <&hdmi_audio>;  
340 - };  
341 -  
342 mxcfb1: fb@0 { 277 mxcfb1: fb@0 {
343 compatible = "fsl,mxc_sdc_fb"; 278 compatible = "fsl,mxc_sdc_fb";
344 disp_dev = "ldb"; 279 disp_dev = "ldb";
345 - interface_pix_fmt = "RGB24";  
346 - default_bpp = <32>;  
347 - int_clk = <0>;  
348 - late_init = <0>;  
349 - status = "disabled";  
350 - };  
351 -  
352 - mxcfb2: fb@1 {  
353 - compatible = "fsl,mxc_sdc_fb";  
354 - disp_dev = "hdmi";  
355 - interface_pix_fmt = "RGB24";  
356 - mode_str ="1920x1080M@60";  
357 - default_bpp = <24>; 280 + interface_pix_fmt = "RGB666";
  281 + default_bpp = <16>;
358 int_clk = <0>; 282 int_clk = <0>;
359 late_init = <0>; 283 late_init = <0>;
360 status = "disabled"; 284 status = "disabled";
@@ -366,29 +290,9 @@ @@ -366,29 +290,9 @@
366 brightness-levels = <0 1 2 3 4 5 6 7 8 9 10>; 290 brightness-levels = <0 1 2 3 4 5 6 7 8 9 10>;
367 default-brightness-level = <8>; 291 default-brightness-level = <8>;
368 }; 292 };
369 -  
370 - v4l2_cap_0: v4l2_cap_0 {  
371 - compatible = "fsl,imx6q-v4l2-capture";  
372 - ipu_id = <0>;  
373 - csi_id = <0>;  
374 - mclk_source = <0>;  
375 - status = "okay";  
376 - };  
377 -  
378 - v4l2_cap_1: v4l2_cap_1 {  
379 - compatible = "fsl,imx6q-v4l2-capture";  
380 - ipu_id = <0>;  
381 - csi_id = <1>;  
382 - mclk_source = <0>;  
383 - status = "okay";  
384 - };  
385 -  
386 - v4l2_out {  
387 - compatible = "fsl,mxc_v4l2_output";  
388 - status = "okay";  
389 - };  
390 }; 293 };
391 294
  295 +
392 &audmux { 296 &audmux {
393 status = "okay"; 297 status = "okay";
394 pinctrl-names = "default"; 298 pinctrl-names = "default";
@@ -397,7 +301,7 @@ @@ -397,7 +301,7 @@
397 301
398 &ecspi1 { 302 &ecspi1 {
399 fsl,spi-num-chipselects = <1>; 303 fsl,spi-num-chipselects = <1>;
400 - cs-gpios = GP_ECSPI1_CS; 304 + cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
401 pinctrl-names = "default"; 305 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_ecspi1>; 306 pinctrl-0 = <&pinctrl_ecspi1>;
403 status = "okay"; 307 status = "okay";
@@ -410,27 +314,13 @@ @@ -410,27 +314,13 @@
410 }; 314 };
411 }; 315 };
412 316
413 -&ecspi2 {  
414 - fsl,spi-num-chipselects = <2>;  
415 - cs-gpios = GP_ECSPI2_CS;  
416 - pinctrl-names = "default";  
417 - pinctrl-0 = <&pinctrl_ecspi2>;  
418 - status = "okay";  
419 -  
420 - spidev@0 {  
421 - compatible = "spidev";  
422 - spi-max-frequency = <20000000>;  
423 - reg = <0>;  
424 - status = "okay";  
425 - };  
426 -};  
427 317
428 &fec { 318 &fec {
429 pinctrl-names = "default"; 319 pinctrl-names = "default";
430 pinctrl-0 = <&pinctrl_enet>; 320 pinctrl-0 = <&pinctrl_enet>;
431 phy-mode = "rgmii"; 321 phy-mode = "rgmii";
432 #if 0 322 #if 0
433 - phy-reset-gpios = GP_ENET_PHY_RESET; 323 + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
434 #endif 324 #endif
435 status = "okay"; 325 status = "okay";
436 326
@@ -438,32 +328,10 @@ @@ -438,32 +328,10 @@
438 #size-cells = <1>; 328 #size-cells = <1>;
439 phy_int { 329 phy_int {
440 reg = <0x6>; 330 reg = <0x6>;
441 - interrupts-extended = GPIRQ_ENET_PHY; 331 + interrupts-extended = <&gpio1 25 GPIO_ACTIVE_LOW>;
442 }; 332 };
443 }; 333 };
444 334
445 -&hdmi_audio {  
446 - status = "okay";  
447 -};  
448 -  
449 -&hdmi_cec {  
450 - pinctrl-names = "default";  
451 - pinctrl-0 = <&pinctrl_hdmi_cec>;  
452 - status = "okay";  
453 -};  
454 -  
455 -&hdmi_core {  
456 - ipu_id = <0>;  
457 - disp_id = <1>;  
458 - status = "okay";  
459 -};  
460 -  
461 -&hdmi_video {  
462 - fsl,phy_reg_vlev = <0x0294>;  
463 - fsl,phy_reg_cksymtx = <0x800d>;  
464 - status = "okay";  
465 -};  
466 -  
467 &i2c1 { 335 &i2c1 {
468 clock-frequency = <100000>; 336 clock-frequency = <100000>;
469 pinctrl-names = "default"; 337 pinctrl-names = "default";
@@ -476,7 +344,8 @@ @@ -476,7 +344,8 @@
476 pinctrl-0 = <&pinctrl_i2c1_sgtl5000>; 344 pinctrl-0 = <&pinctrl_i2c1_sgtl5000>;
477 reg = <0x0a>; 345 reg = <0x0a>;
478 clocks = <&clks 201>; 346 clocks = <&clks 201>;
479 - VDDA-supply = <&reg_2p5v>; 347 + VDDA-supply = <&reg_3p3v>;
  348 + VDDD-supply = <&reg_1p2v>;
480 VDDIO-supply = <&reg_3p3v>; 349 VDDIO-supply = <&reg_3p3v>;
481 }; 350 };
482 }; 351 };
@@ -487,23 +356,20 @@ @@ -487,23 +356,20 @@
487 pinctrl-0 = <&pinctrl_i2c2>; 356 pinctrl-0 = <&pinctrl_i2c2>;
488 status = "okay"; 357 status = "okay";
489 358
490 - hdmi: edid@50 {  
491 - compatible = "fsl,imx6-hdmi-i2c";  
492 - reg = <0x50>;  
493 - };  
494 -  
495 rtc: ds1339@68 { 359 rtc: ds1339@68 {
496 compatible = "dallas,ds1339"; 360 compatible = "dallas,ds1339";
497 reg = <0x68>; 361 reg = <0x68>;
498 }; 362 };
499 363
500 - max1180: max11801@48 {  
501 - compatible = "maxim,max11801"; 364 + tsc2007: tsc2007@48 {
  365 + compatible = "ti,tsc2007";
502 reg = <0x48>; 366 reg = <0x48>;
503 pinctrl-names = "default"; 367 pinctrl-names = "default";
504 - pinctrl-0 = <&pinctrl_i2c2_max1180>;  
505 - interrupts-extended = GPIRQ_MAX1180;  
506 - work-mode = <0>; 368 + pinctrl-0 = <&pinctrl_i2c2_tsc2007>;
  369 + interrupt-parent = <&gpio6>;
  370 + interrupts = <9 0>;
  371 + gpios = <&gpio6 9 0>;
  372 + ti,x-plate-ohms = <180>;
507 }; 373 };
508 }; 374 };
509 375
@@ -515,39 +381,32 @@ @@ -515,39 +381,32 @@
515 }; 381 };
516 382
517 &ldb { 383 &ldb {
  384 + split-mode = <1>;
518 status = "okay"; 385 status = "okay";
519 386
520 lvds-channel@0 { 387 lvds-channel@0 {
521 fsl,data-mapping = "spwg"; 388 fsl,data-mapping = "spwg";
522 - fsl,data-width = <24>; 389 + fsl,data-width = <18>;
523 status = "okay"; 390 status = "okay";
524 primary; 391 primary;
525 392
526 display-timings { 393 display-timings {
527 native-mode = <&timing0>; 394 native-mode = <&timing0>;
528 - timing0: LDB-G156BGE {  
529 - clock-frequency = <76000000>;  
530 - hactive = <1366>;  
531 - vactive = <768>;  
532 - hback-porch = <130>;  
533 - hfront-porch = <60>;  
534 - vback-porch = <32>;  
535 - vfront-porch = <3>;  
536 - hsync-len = <4>;  
537 - vsync-len = <3>; 395 + timing0: LDB-LP133WD2 {
  396 + clock-frequency = <48870000>;
  397 + hactive = <1600>;
  398 + vactive = <900>;
  399 + hback-porch = <44>;
  400 + hfront-porch = <24>;
  401 + vback-porch = <7>;
  402 + vfront-porch = <2>;
  403 + hsync-len = <24>;
  404 + vsync-len = <3>;
538 }; 405 };
539 }; 406 };
540 }; 407 };
541 }; 408 };
542 409
543 -&pcie {  
544 - pinctrl-names = "default";  
545 - pinctrl-0 = <&pinctrl_pcie>;  
546 - reset-gpio = GP_PCIE_RESET;  
547 - wake-up-gpio = GP_PCIE_WAKE;  
548 - status = "okay";  
549 -};  
550 -  
551 &pwm1 { 410 &pwm1 {
552 pinctrl-names = "default"; 411 pinctrl-names = "default";
553 pinctrl-0 = <&pinctrl_pwm1>; 412 pinctrl-0 = <&pinctrl_pwm1>;
@@ -574,7 +433,6 @@ @@ -574,7 +433,6 @@
574 &uart3 { 433 &uart3 {
575 pinctrl-names = "default"; 434 pinctrl-names = "default";
576 pinctrl-0 = <&pinctrl_uart3>; 435 pinctrl-0 = <&pinctrl_uart3>;
577 - fsl,uart-has-rtscts;  
578 status = "okay"; 436 status = "okay";
579 }; 437 };
580 438
@@ -601,8 +459,8 @@ @@ -601,8 +459,8 @@
601 pinctrl-names = "default"; 459 pinctrl-names = "default";
602 pinctrl-0 = <&pinctrl_usdhc3>; 460 pinctrl-0 = <&pinctrl_usdhc3>;
603 bus-width = <4>; 461 bus-width = <4>;
604 - cd-gpios = GP_USDHC3_CD;  
605 - wp-gpios = GP_USDHC3_WP; 462 + cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
  463 + wp-gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
606 vmmc-supply = <&reg_3p3v>; 464 vmmc-supply = <&reg_3p3v>;
607 status = "okay"; 465 status = "okay";
608 }; 466 };
@@ -616,4 +474,3 @@ @@ -616,4 +474,3 @@
616 keep-power-in-suspend; 474 keep-power-in-suspend;
617 status = "okay"; 475 status = "okay";
618 }; 476 };
619 -  
kernel/linux-imx6_3.14.28/arch/arm/boot/dts/imx6s-prime-oven.dts 100644 → 100755
@@ -26,10 +26,6 @@ @@ -26,10 +26,6 @@
26 status = "okay"; 26 status = "okay";
27 }; 27 };
28 28
29 -&mxcfb2 {  
30 - status = "okay";  
31 -};  
32 -  
33 &ldb { 29 &ldb {
34 lvds-channel@0 { 30 lvds-channel@0 {
35 crtc = "ipu1-di1"; 31 crtc = "ipu1-di1";
kernel/linux-imx6_3.14.28/arch/arm/configs/imx6s_prime_oven_defconfig
@@ -155,7 +155,7 @@ CONFIG_EVENTFD=y @@ -155,7 +155,7 @@ CONFIG_EVENTFD=y
155 CONFIG_SHMEM=y 155 CONFIG_SHMEM=y
156 CONFIG_AIO=y 156 CONFIG_AIO=y
157 CONFIG_PCI_QUIRKS=y 157 CONFIG_PCI_QUIRKS=y
158 -# CONFIG_EMBEDDED is not set 158 +CONFIG_EMBEDDED=y
159 CONFIG_HAVE_PERF_EVENTS=y 159 CONFIG_HAVE_PERF_EVENTS=y
160 CONFIG_PERF_USE_VMALLOC=y 160 CONFIG_PERF_USE_VMALLOC=y
161 161
@@ -1835,7 +1835,7 @@ CONFIG_PINCTRL=y @@ -1835,7 +1835,7 @@ CONFIG_PINCTRL=y
1835 # 1835 #
1836 CONFIG_PINMUX=y 1836 CONFIG_PINMUX=y
1837 CONFIG_PINCONF=y 1837 CONFIG_PINCONF=y
1838 -CONFIG_DEBUG_PINCTRL=y 1838 +# CONFIG_DEBUG_PINCTRL is not set
1839 # CONFIG_PINCTRL_CAPRI is not set 1839 # CONFIG_PINCTRL_CAPRI is not set
1840 CONFIG_PINCTRL_IMX=y 1840 CONFIG_PINCTRL_IMX=y
1841 CONFIG_PINCTRL_IMX6Q=y 1841 CONFIG_PINCTRL_IMX6Q=y
kernel/linux-imx6_3.14.28/make.sh 100644 → 100755
@@ -12,10 +12,10 @@ then @@ -12,10 +12,10 @@ then
12 fi 12 fi
13 13
14 image_filename="arch/arm/boot/uImage" 14 image_filename="arch/arm/boot/uImage"
15 -dtb_filename="arch/arm/boot/dts/imx6sl-prime-oven.dtb" 15 +dtb_filename="arch/arm/boot/dts/imx6s-prime-oven.dtb"
16 16
17 image_target_filename="uImage" 17 image_target_filename="uImage"
18 -dtb_target_filename="imx6sl-prime-oven.dtb" 18 +dtb_target_filename="imx6s-prime-oven.dtb"
19 19
20 if [ -f .config ]; then 20 if [ -f .config ]; then
21 echo ".....mrproper" 21 echo ".....mrproper"
@@ -29,9 +29,9 @@ fi @@ -29,9 +29,9 @@ fi
29 29
30 30
31 if [ ! -f $build_path/.config ]; then 31 if [ ! -f $build_path/.config ]; then
32 - echo ".....imx6sl prime oven defconfig" 32 + echo ".....imx6s prime oven defconfig"
33 ARCH=arm make arm=ARM O=$build_path distclean 33 ARCH=arm make arm=ARM O=$build_path distclean
34 - ARCH=arm make arm=ARM O=$build_path imx6sl_prime_oven_defconfig 34 + ARCH=arm make arm=ARM O=$build_path imx6s_prime_oven_defconfig
35 fi 35 fi
36 36
37 37