/* * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include "am57xx-beagle-x15-revb1.dts" #include "am57xx-evm-common.dtsi" #include "am57xx-industrial-grade.dtsi" / { model = "TI AM572x EVM Rev A3"; reserved-memory { jailhouse: jailhouse@ef000000 { reg = <0x0 0xef000000 0x0 0x1000000>; no-map; status = "okay"; }; jh_inmate: jh_inmate@ee000000 { reg = <0x0 0xee000000 0x0 0x1000000>; no-map; status = "okay"; }; }; }; &timer8 { status = "disabled"; ti,no-idle; }; &timer7 { status = "disabled"; ti,no-idle; }; &uart9 { status = "disabled"; ti,no-idle; }; &dra7_pmx_core { /* * TODO: We should be able to move PinMux values defined here to * am57xx-beagle-x15-revb1.dts once that board is available and * its MMC/SD interface is verified. For now these stay here until * that exercise is complete. */ mmc1_pins_default: mmc1_pins_default { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3754, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_clk.clk */ DRA7XX_CORE_IOPAD(0x3758, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_cmd.cmd */ DRA7XX_CORE_IOPAD(0x375c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat0.dat0 */ DRA7XX_CORE_IOPAD(0x3760, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat1.dat1 */ DRA7XX_CORE_IOPAD(0x3764, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat2.dat2 */ DRA7XX_CORE_IOPAD(0x3768, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_hs: pinmux_mmc1_hs_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3754, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_clk.clk */ DRA7XX_CORE_IOPAD(0x3758, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_cmd.cmd */ DRA7XX_CORE_IOPAD(0x375c, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_dat0.dat0 */ DRA7XX_CORE_IOPAD(0x3760, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_dat1.dat1 */ DRA7XX_CORE_IOPAD(0x3764, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_dat2.dat2 */ DRA7XX_CORE_IOPAD(0x3768, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3754, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_clk.clk */ DRA7XX_CORE_IOPAD(0x3758, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_cmd.cmd */ DRA7XX_CORE_IOPAD(0x375c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat0.dat0 */ DRA7XX_CORE_IOPAD(0x3760, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat1.dat1 */ DRA7XX_CORE_IOPAD(0x3764, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat2.dat2 */ DRA7XX_CORE_IOPAD(0x3768, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr25: pinmux_mmc1_sdr25_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3754, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_clk.clk */ DRA7XX_CORE_IOPAD(0x3758, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_cmd.cmd */ DRA7XX_CORE_IOPAD(0x375c, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_dat0.dat0 */ DRA7XX_CORE_IOPAD(0x3760, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_dat1.dat1 */ DRA7XX_CORE_IOPAD(0x3764, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_dat2.dat2 */ DRA7XX_CORE_IOPAD(0x3768, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr50: pinmux_mmc1_sdr50_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3754, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)) /* mmc1_clk.clk */ DRA7XX_CORE_IOPAD(0x3758, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)) /* mmc1_cmd.cmd */ DRA7XX_CORE_IOPAD(0x375c, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)) /* mmc1_dat0.dat0 */ DRA7XX_CORE_IOPAD(0x3760, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)) /* mmc1_dat1.dat1 */ DRA7XX_CORE_IOPAD(0x3764, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)) /* mmc1_dat2.dat2 */ DRA7XX_CORE_IOPAD(0x3768, (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0)) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_ddr50: pinmux_mmc1_ddr50_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3754, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0))/* mmc1_clk.clk */ DRA7XX_CORE_IOPAD(0x3758, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_cmd.cmd */ DRA7XX_CORE_IOPAD(0x375c, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_dat0.dat0 */ DRA7XX_CORE_IOPAD(0x3760, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_dat1.dat1 */ DRA7XX_CORE_IOPAD(0x3764, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_dat2.dat2 */ DRA7XX_CORE_IOPAD(0x3768, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr104: pinmux_mmc1_sdr104_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3754, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0))/* mmc1_clk.clk */ DRA7XX_CORE_IOPAD(0x3758, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_cmd.cmd */ DRA7XX_CORE_IOPAD(0x375c, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_dat0.dat0 */ DRA7XX_CORE_IOPAD(0x3760, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_dat1.dat1 */ DRA7XX_CORE_IOPAD(0x3764, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_dat2.dat2 */ DRA7XX_CORE_IOPAD(0x3768, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)) /* mmc1_dat3.dat3 */ >; }; mmc2_pins_default: mmc2_pins_default { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x349c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a23.mmc2_clk */ DRA7XX_CORE_IOPAD(0x34b0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */ DRA7XX_CORE_IOPAD(0x34a0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */ DRA7XX_CORE_IOPAD(0x34a4, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */ DRA7XX_CORE_IOPAD(0x34a8, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */ DRA7XX_CORE_IOPAD(0x34ac, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */ DRA7XX_CORE_IOPAD(0x348c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */ DRA7XX_CORE_IOPAD(0x3490, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */ DRA7XX_CORE_IOPAD(0x3494, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */ DRA7XX_CORE_IOPAD(0x3498, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */ >; }; mmc2_pins_hs: mmc2_pins_hs { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x349c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a23.mmc2_clk */ DRA7XX_CORE_IOPAD(0x34b0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */ DRA7XX_CORE_IOPAD(0x34a0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */ DRA7XX_CORE_IOPAD(0x34a4, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */ DRA7XX_CORE_IOPAD(0x34a8, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */ DRA7XX_CORE_IOPAD(0x34ac, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */ DRA7XX_CORE_IOPAD(0x348c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */ DRA7XX_CORE_IOPAD(0x3490, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */ DRA7XX_CORE_IOPAD(0x3494, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */ DRA7XX_CORE_IOPAD(0x3498, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */ >; }; mmc2_pins_ddr_3_3v: pinmux_mmc2_ddr_3_3v_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x349c, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a23.mmc2_clk */ DRA7XX_CORE_IOPAD(0x34b0, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */ DRA7XX_CORE_IOPAD(0x34a0, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */ DRA7XX_CORE_IOPAD(0x34a4, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */ DRA7XX_CORE_IOPAD(0x34a8, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */ DRA7XX_CORE_IOPAD(0x34ac, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */ DRA7XX_CORE_IOPAD(0x348c, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */ DRA7XX_CORE_IOPAD(0x3490, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */ DRA7XX_CORE_IOPAD(0x3494, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */ DRA7XX_CORE_IOPAD(0x3498, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */ >; }; mmc3_pins_default: mmc3_pins_default { pinctrl-single,pins = < 0x37c (PIN_INPUT_PULLUP | MUX_MODE0)/* mmc3_clk.mmc3_clk */ 0x380 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ 0x384 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ 0x388 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ 0x38c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ 0x390 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ >; }; mmc3_pins_hs: mmc3_pins_hs { pinctrl-single,pins = < 0x37c (PIN_INPUT_PULLUP | MUX_MODE0)/* mmc3_clk.mmc3_clk */ 0x380 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ 0x384 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ 0x388 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ 0x38c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ 0x390 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ >; }; mmc3_pins_sdr12: mmc3_pins_sdr12 { pinctrl-single,pins = < 0x37c (PIN_INPUT_PULLUP | MUX_MODE0)/* mmc3_clk.mmc3_clk */ 0x380 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ 0x384 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ 0x388 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ 0x38c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ 0x390 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ >; }; mmc3_pins_sdr25: mmc3_pins_sdr25 { pinctrl-single,pins = < 0x37c (PIN_INPUT_PULLUP | MUX_MODE0)/* mmc3_clk.mmc3_clk */ 0x380 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ 0x384 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ 0x388 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ 0x38c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ 0x390 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ >; }; mmc3_pins_sdr50: mmc3_pins_sdr50 { pinctrl-single,pins = < 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0)/* mmc3_clk.mmc3_clk */ 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ >; }; }; &dra7_iodelay_core { mmc1_iodelay_ddr50_conf: mmc1_iodelay_ddr50_conf { pinctrl-single,pins = < 0x618 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CLK_IN */ 0x620 (A_DELAY(1271) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */ 0x624 (A_DELAY(229) | G_DELAY(0)) /* CFG_MMC1_CMD_IN */ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ 0x62C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ 0x630 (A_DELAY(850) | G_DELAY(0)) /* CFG_MMC1_DAT0_IN */ 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ 0x638 (A_DELAY(20) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ 0x63C (A_DELAY(468) | G_DELAY(0)) /* CFG_MMC1_DAT1_IN */ 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ 0x648 (A_DELAY(466) | G_DELAY(0)) /* CFG_MMC1_DAT2_IN */ 0x64C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ 0x654 (A_DELAY(399) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */ 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ 0x65C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ >; }; mmc1_iodelay_sdr104_conf: mmc1_iodelay_sdr104_conf { pinctrl-single,pins = < 0x620 (A_DELAY(600) | G_DELAY(400)) /* CFG_MMC1_CLK_OUT */ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ 0x62c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ 0x638 (A_DELAY(30) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ >; }; mmc2_iodelay_ddr_3_3v_conf: mmc2_iodelay_ddr_3_3v_conf { pinctrl-single,pins = < 0x18c (A_DELAY(270) | G_DELAY(0)) /* CFG_GPMC_A19_IN */ 0x1a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_IN */ 0x1b0 (A_DELAY(170) | G_DELAY(0)) /* CFG_GPMC_A21_IN */ 0x1bc (A_DELAY(758) | G_DELAY(0)) /* CFG_GPMC_A22_IN */ 0x1c8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A23_IN */ 0x1d4 (A_DELAY(81) | G_DELAY(0)) /* CFG_GPMC_A24_IN */ 0x1e0 (A_DELAY(286) | G_DELAY(0)) /* CFG_GPMC_A25_IN */ 0x1ec (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_IN */ 0x1f8 (A_DELAY(123) | G_DELAY(0)) /* CFG_GPMC_A27_IN */ 0x360 (A_DELAY(346) | G_DELAY(0)) /* CFG_GPMC_CS1_IN */ 0x190 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */ 0x194 (A_DELAY(55) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ 0x1a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */ 0x1ac (A_DELAY(422) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ 0x1b4 (A_DELAY(642) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */ 0x1b8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ 0x1c0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */ 0x1c4 (A_DELAY(128) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ 0x1d0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A23_OUT */ 0x1d8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */ 0x1dc (A_DELAY(395) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ 0x1e4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */ 0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ 0x1f0 (A_DELAY(623) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */ 0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ 0x1fc (A_DELAY(54) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */ 0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ 0x364 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */ 0x368 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ >; }; mmc3_iodelay_manual1_conf: mmc3_iodelay_manual1_conf { pinctrl-single,pins = < 0x678 (A_DELAY(117) | G_DELAY(0)) /* CFG_MMC3_CLK_IN */ 0x680 (A_DELAY(1269) | G_DELAY(0)) /* CFG_MMC3_CLK_OUT */ 0x684 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_IN */ 0x688 (A_DELAY(128) | G_DELAY(0)) /* CFG_MMC3_CMD_OEN */ 0x68c (A_DELAY(98) | G_DELAY(0)) /* CFG_MMC3_CMD_OUT */ 0x690 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_IN */ 0x694 (A_DELAY(362) | G_DELAY(0)) /* CFG_MMC3_DAT0_OEN */ 0x698 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OUT */ 0x69c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_IN */ 0x6a0 (A_DELAY(333) | G_DELAY(0)) /* CFG_MMC3_DAT1_OEN */ 0x6a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OUT */ 0x6a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_IN */ 0x6ac (A_DELAY(402) | G_DELAY(0)) /* CFG_MMC3_DAT2_OEN */ 0x6b0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OUT */ 0x6b4 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_IN */ 0x6b8 (A_DELAY(549) | G_DELAY(0)) /* CFG_MMC3_DAT3_OEN */ 0x6bc (A_DELAY(1) | G_DELAY(0)) /* CFG_MMC3_DAT3_OUT */ >; }; }; &mmc1 { pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>; pinctrl-4 = <&mmc1_pins_sdr50>; pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_conf>; pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_conf>; vmmc-supply = <&vdd_3v3>; vmmc_aux-supply = <&ldo1_reg>; max-frequency = <192000000>; }; &mmc2 { pinctrl-names = "default", "hs", "ddr_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_3_3v &mmc2_iodelay_ddr_3_3v_conf>; max-frequency = <192000000>; /delete-property/ mmc-hs200-1_8v; };