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kernel/linux-rt-4.4.41/arch/mips/include/asm/string.h 2.94 KB
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  /*
   * This file is subject to the terms and conditions of the GNU General Public
   * License.  See the file "COPYING" in the main directory of this archive
   * for more details.
   *
   * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle
   * Copyright (c) 2000 by Silicon Graphics, Inc.
   * Copyright (c) 2001 MIPS Technologies, Inc.
   */
  #ifndef _ASM_STRING_H
  #define _ASM_STRING_H
  
  
  /*
   * Most of the inline functions are rather naive implementations so I just
   * didn't bother updating them for 64-bit ...
   */
  #ifdef CONFIG_32BIT
  
  #ifndef IN_STRING_C
  
  #define __HAVE_ARCH_STRCPY
  static __inline__ char *strcpy(char *__dest, __const__ char *__src)
  {
    char *__xdest = __dest;
  
    __asm__ __volatile__(
  	".set\tnoreorder
  \t"
  	".set\tnoat
  "
  	"1:\tlbu\t$1,(%1)
  \t"
  	"addiu\t%1,1
  \t"
  	"sb\t$1,(%0)
  \t"
  	"bnez\t$1,1b
  \t"
  	"addiu\t%0,1
  \t"
  	".set\tat
  \t"
  	".set\treorder"
  	: "=r" (__dest), "=r" (__src)
  	: "0" (__dest), "1" (__src)
  	: "memory");
  
    return __xdest;
  }
  
  #define __HAVE_ARCH_STRNCPY
  static __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n)
  {
    char *__xdest = __dest;
  
    if (__n == 0)
      return __xdest;
  
    __asm__ __volatile__(
  	".set\tnoreorder
  \t"
  	".set\tnoat
  "
  	"1:\tlbu\t$1,(%1)
  \t"
  	"subu\t%2,1
  \t"
  	"sb\t$1,(%0)
  \t"
  	"beqz\t$1,2f
  \t"
  	"addiu\t%0,1
  \t"
  	"bnez\t%2,1b
  \t"
  	"addiu\t%1,1
  "
  	"2:
  \t"
  	".set\tat
  \t"
  	".set\treorder"
  	: "=r" (__dest), "=r" (__src), "=r" (__n)
  	: "0" (__dest), "1" (__src), "2" (__n)
  	: "memory");
  
    return __xdest;
  }
  
  #define __HAVE_ARCH_STRCMP
  static __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct)
  {
    int __res;
  
    __asm__ __volatile__(
  	".set\tnoreorder
  \t"
  	".set\tnoat
  \t"
  	"lbu\t%2,(%0)
  "
  	"1:\tlbu\t$1,(%1)
  \t"
  	"addiu\t%0,1
  \t"
  	"bne\t$1,%2,2f
  \t"
  	"addiu\t%1,1
  \t"
  	"bnez\t%2,1b
  \t"
  	"lbu\t%2,(%0)
  \t"
  #if defined(CONFIG_CPU_R3000)
  	"nop
  \t"
  #endif
  	"move\t%2,$1
  "
  	"2:\tsubu\t%2,$1
  "
  	"3:\t.set\tat
  \t"
  	".set\treorder"
  	: "=r" (__cs), "=r" (__ct), "=r" (__res)
  	: "0" (__cs), "1" (__ct));
  
    return __res;
  }
  
  #endif /* !defined(IN_STRING_C) */
  
  #define __HAVE_ARCH_STRNCMP
  static __inline__ int
  strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
  {
  	int __res;
  
  	__asm__ __volatile__(
  	".set\tnoreorder
  \t"
  	".set\tnoat
  "
  	"1:\tlbu\t%3,(%0)
  \t"
  	"beqz\t%2,2f
  \t"
  	"lbu\t$1,(%1)
  \t"
  	"subu\t%2,1
  \t"
  	"bne\t$1,%3,3f
  \t"
  	"addiu\t%0,1
  \t"
  	"bnez\t%3,1b
  \t"
  	"addiu\t%1,1
  "
  	"2:
  \t"
  #if defined(CONFIG_CPU_R3000)
  	"nop
  \t"
  #endif
  	"move\t%3,$1
  "
  	"3:\tsubu\t%3,$1
  \t"
  	".set\tat
  \t"
  	".set\treorder"
  	: "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res)
  	: "0" (__cs), "1" (__ct), "2" (__count));
  
  	return __res;
  }
  #endif /* CONFIG_32BIT */
  
  #define __HAVE_ARCH_MEMSET
  extern void *memset(void *__s, int __c, size_t __count);
  
  #define __HAVE_ARCH_MEMCPY
  extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
  
  #define __HAVE_ARCH_MEMMOVE
  extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
  
  #endif /* _ASM_STRING_H */