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kernel/linux-rt-4.4.41/arch/m32r/platforms/mappi/dot.gdbinit.smp 8.73 KB
5113f6f70   김현기   kernel add
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  # .gdbinit file
  # $Id$
  
  # setting
  set width 0d70
  set radix 0d16
  debug_chaos
  
  # clk xin:cpu:bif:bus=1:4:2:1
  define clock_init_on
    set *(unsigned long *)0x00ef4024 = 2
    set *(unsigned long *)0x00ef4020 = 1
    set *(unsigned long *)0x00ef4010 = 0
    set *(unsigned long *)0x00ef4014 = 0
    set *(unsigned long *)0x00ef4004 = 0x1
    shell sleep 0.1
    set *(unsigned long *)0x00ef4008 = 0x0200
  #  set *(unsigned long *)0x00ef4008 = 0x0201
  end
  
  # clk xin:cpu:bif:bus=1:4:1:1
  define clock_init_on_1411
    set *(unsigned long *)0x00ef4024 = 2
    set *(unsigned long *)0x00ef4020 = 2
    set *(unsigned long *)0x00ef4010 = 0
    set *(unsigned long *)0x00ef4014 = 0
    set *(unsigned long *)0x00ef4004 = 0x1
    shell sleep 0.1
    set *(unsigned long *)0x00ef4008 = 0x0200
  end
  
  # clk xin:cpu:bif:bus=1:4:2:1
  define clock_init_on_1421
    set *(unsigned long *)0x00ef4024 = 2
    set *(unsigned long *)0x00ef4020 = 1
    set *(unsigned long *)0x00ef4010 = 0
    set *(unsigned long *)0x00ef4014 = 0
    set *(unsigned long *)0x00ef4004 = 0x1
    shell sleep 0.1
    set *(unsigned long *)0x00ef4008 = 0x0200
  end
  
  # clk xin:cpu:bif:bus=1:8:2:1
  define clock_init_on_1821
    set *(unsigned long *)0x00ef4024 = 3
    set *(unsigned long *)0x00ef4020 = 2
    set *(unsigned long *)0x00ef4010 = 0
    set *(unsigned long *)0x00ef4014 = 0
    set *(unsigned long *)0x00ef4004 = 0x3
    shell sleep 0.1
    set *(unsigned long *)0x00ef4008 = 0x0200
  end
  
  # clk xin:cpu:bif:bus=1:8:4:1
  define clock_init_on_1841
    set *(unsigned long *)0x00ef4024 = 3
    set *(unsigned long *)0x00ef4020 = 1
    set *(unsigned long *)0x00ef4010 = 0
    set *(unsigned long *)0x00ef4014 = 0
    set *(unsigned long *)0x00ef4004 = 0x3
    shell sleep 0.1
    set *(unsigned long *)0x00ef4008 = 0x0200
  end
  
  # clk xin:cpu:bif:bus=1:16:8:1
  define clock_init_on_11681
    set *(unsigned long *)0x00ef4024 = 4
    set *(unsigned long *)0x00ef4020 = 2
    set *(unsigned long *)0x00ef4010 = 0
    set *(unsigned long *)0x00ef4014 = 0
    set *(unsigned long *)0x00ef4004 = 0x7
    shell sleep 0.1
    set *(unsigned long *)0x00ef4008 = 0x0200
  end
  
  # clk xin:cpu:bif:bus=1:1:1:1
  define clock_init_off
    # CPU
    set *(unsigned long *)0x00ef4010 = 0
    set *(unsigned long *)0x00ef4014 = 0
    # BIF
    set *(unsigned long *)0x00ef4020 = 0
    # BUS
    set *(unsigned long *)0x00ef4024 = 0
    # PLL
    set *(unsigned long *)0x00ef4008 = 0x0000
  end
  
  # Initialize programmable ports
  define port_init
    set $sfrbase = 0x00ef0000
    set *(unsigned short *)0x00ef1060 = 0x5555
    set *(unsigned short *)0x00ef1062 = 0x5555
    set *(unsigned short *)0x00ef1064 = 0x5555
    set *(unsigned short *)0x00ef1066 = 0x5555
    set *(unsigned short *)0x00ef1068 = 0x5555
    set *(unsigned short *)0x00ef106a = 0x0000
    set *(unsigned short *)0x00ef106e = 0x5555
    set *(unsigned short *)0x00ef1070 = 0x5555
    # LED ON
    set *(unsigned char *)($sfrbase + 0x1015) = 0xff
    set *(unsigned char *)($sfrbase + 0x1085) = 0xff
    shell sleep 0.1
    # LED OFF
    set *(unsigned char *)($sfrbase + 0x1085) = 0x00
  end
  document port_init
    P5=LED(output), P6.b4=LAN_RESET(output)
  end
  
  # Initialize SDRAM controller for Mappi
  define sdram_init
    # SDIR0
    set *(unsigned long *)0x00ef6008 = 0x00000182
    # SDIR1
    set *(unsigned long *)0x00ef600c = 0x00000001
    # Initialize wait
    shell sleep 0.1
    # Ch0-MOD
    set *(unsigned long *)0x00ef602c = 0x00000020
    # Ch0-TR
    set *(unsigned long *)0x00ef6028 = 0x00010002
    # Ch0-ADR
    set *(unsigned long *)0x00ef6020 = 0x08000004
    # AutoRef On
    set *(unsigned long *)0x00ef6004 = 0x00010107
    # Access enable
    set *(unsigned long *)0x00ef6024 = 0x00000001
  end
  document sdram_init
    Mappi SDRAM controller initialization
    0x08000000 - 0x0bffffff (64MB)
  end
  
  # Initialize LAN controller for Mappi
  define lanc_init
    set $sfrbase = 0x00ef0000
    # Set BSEL3 (BSEL3 for the Chaos's bselc)
  #  set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040
  #  set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101
    set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000
    set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103
    set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
    # Reset (P5=LED,P6.b4=LAN_RESET)
    set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
    set *(unsigned char *)($sfrbase + 0x1016) = 0xff
    set *(unsigned char *)($sfrbase + 0x1086) = 0xff
    shell sleep 0.1
  #  set *(unsigned char *)($sfrbase + 0x1086) = 0x00
    set *(unsigned char *)($sfrbase + 0x1086) = 0x04
    set *(unsigned long *)(0x0c000330) = 0xffffffff
    # Set mac address
    set $lanc = (void*)0x0c000300
    set *(unsigned long *)($lanc + 0x0000) = 0x00610010
    set *(unsigned long *)($lanc + 0x0004) = 0x00200030
    set *(unsigned long *)($lanc + 0x0008) = 0x00400050
    set *(unsigned long *)($lanc + 0x000c) = 0x00600007
  end
  document lanc_init
    Mappi LAN controller initialization
    ex.) MAC address:  10 20 30 40 50 60
  end
  
  # LCD & CRT dual-head setting (8bpp)
  define dispc_init
    set $sfrbase = 0x00ef0000
    # BSEL4 Dispc
    # 20MHz
  #  set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282
  #  set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202
    # 40MHz
    set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000
    set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103
  end
  
  # MMU enable
  define mmu_enable
    set $evb=0x88000000
    set *(unsigned long *)0xffff0024=1
  end
  
  # MMU disable
  define mmu_disable
    set $evb=0
    set *(unsigned long *)0xffff0024=0
  end
  
  # Show TLB entries
  define show_tlb_entries
    set $i = 0
    set $addr = $arg0
    use_mon_code
    while ($i < 0d32 )
      set $tlb_tag = *(unsigned long*)$addr
      set $tlb_data = *(unsigned long*)($addr + 4)
      printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx
  ", $i, $addr, $tlb_tag, $tlb_data
      set $i = $i + 1
      set $addr = $addr + 8
    end
    use_debug_dma
  end
  define itlb
    set $itlb=0xfe000000
    show_tlb_entries $itlb
  end
  define dtlb
    set $dtlb=0xfe000800
    show_tlb_entries $dtlb
  end
  
  
  # Show current task structure
  define show_current
    set $current = $spi & 0xffffe000
    printf "$current=0x%08lX
  ",$current
    print *(struct task_struct *)$current
  end
  
  # Show user assigned task structure
  define show_task
    set $task = $arg0 & 0xffffe000
    printf "$task=0x%08lX
  ",$task
    print *(struct task_struct *)$task
  end
  document show_task
    Show user assigned task structure
    arg0 : task structure address
  end
  
  # Show M32R registers
  define show_regs
    printf " R0[0x%08lX]   R1[0x%08lX]   R2[0x%08lX]   R3[0x%08lX]
  ",$r0,$r1,$r2,$r3
    printf " R4[0x%08lX]   R5[0x%08lX]   R6[0x%08lX]   R7[0x%08lX]
  ",$r4,$r5,$r6,$r7
    printf " R8[0x%08lX]   R9[0x%08lX]  R10[0x%08lX]  R11[0x%08lX]
  ",$r8,$r9,$r10,$r11
    printf "R12[0x%08lX]   FP[0x%08lX]   LR[0x%08lX]   SP[0x%08lX]
  ",$r12,$fp,$lr,$fp
    printf "PSW[0x%08lX]  CBR[0x%08lX]  SPI[0x%08lX]  SPU[0x%08lX]
  ",$psw,$cbr,$spi,$spu
    printf "BPC[0x%08lX]   PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]
  ",$bpc,$pc,$accl,$acch
    printf "EVB[0x%08lX]
  ",$evb
  end
  
  
  # Setup all
  define setup
    use_mon_code
    set *(unsigned int)0xfffffffc=0x60
    shell sleep 0.1
  #  clock_init_on_1411
    clock_init_on_1421
  #  clock_init_on_1821
  #  clock_init_on_1841
  #  clock_init_on_11681
  #  clock_init_off
    shell sleep 0.1
    port_init
    sdram_init
    lanc_init
    dispc_init
    set $evb=0x08000000
  end
  
  # Load modules
  define load_modules
    use_debug_dma
    load
  #  load ramdisk_082a0000.mot
  #  load romfs_082a0000.mot
  #  use_mon_code
  end
  
  # Set kernel parameters
  define set_kernel_parameters
    set $param = (void*)0x08001000
    # INITRD_START
  # set *(unsigned long *)($param + 0x0010) = 0x082a0000
    # INITRD_SIZE
  #  set *(unsigned long *)($param + 0x0014) = 0x00000000
    # M32R_CPUCLK
    set *(unsigned long *)($param + 0x0018) = 0d160000000
  #  set *(unsigned long *)($param + 0x0018) = 0d80000000
  #  set *(unsigned long *)($param + 0x0018) = 0d40000000
    # M32R_BUSCLK
    set *(unsigned long *)($param + 0x001c) = 0d40000000
  
    # M32R_TIMER_DIVIDE
    set *(unsigned long *)($param + 0x0020) = 0d128
  
    set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
  #  set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
  end
  
  # Boot
  define boot
    set_kernel_parameters
    set $pc=0x08002000
    set *(unsigned char *)0x08001003=0x03
    si
    c
  end
  
  # Set breakpoints
  define set_breakpoints
    b *0x08000030
  end
  
  ## Boot MP
  define boot_mp
    set_kernel_parameters
    set *(unsigned long *)0x00f00000 = boot - 0x80000000
    set *(unsigned long *)0x00eff2f8 = 0x2
    x 0x00eff2f8
  
    set $pc=0x08002000
    si
    c
  end
  document boot_mp
    Boot BSP
  end
  
  ## Boot UP
  define boot_up
    set_kernel_parameters
    set $pc=0x08002000
    si
    c
  end
  document boot_up
    Boot BSP
  end
  
  # Restart
  define restart
    sdireset
    sdireset
    setup
    load_modules
    boot_mp
  end
  
  sdireset
  sdireset
  file vmlinux
  target m32rsdi
  setup