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kernel/linux-rt-4.4.41/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi 3.83 KB
5113f6f70   김현기   kernel add
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  /*
   * Copyright (C) 2013,2014 Russell King
   *
   * This describes the hookup for an AR8035 to the iMX6 on the SolidRun
   * MicroSOM.
   *
   * This file is dual-licensed: you can use it either under the terms
   * of the GPL or the X11 license, at your option. Note that this dual
   * licensing only applies to this file, and not this project as a
   * whole.
   *
   *  a) This file is free software; you can redistribute it and/or
   *     modify it under the terms of the GNU General Public License
   *     version 2 as published by the Free Software Foundation.
   *
   *     This file is distributed in the hope that it will be useful
   *     but WITHOUT ANY WARRANTY; without even the implied warranty of
   *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   *     GNU General Public License for more details.
   *
   * Or, alternatively
   *
   *  b) Permission is hereby granted, free of charge, to any person
   *     obtaining a copy of this software and associated documentation
   *     files (the "Software"), to deal in the Software without
   *     restriction, including without limitation the rights to use
   *     copy, modify, merge, publish, distribute, sublicense, and/or
   *     sell copies of the Software, and to permit persons to whom the
   *     Software is furnished to do so, subject to the following
   *     conditions:
   *
   *     The above copyright notice and this permission notice shall be
   *     included in all copies or substantial portions of the Software.
   *
   *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
   *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
   *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
   *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
   *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
   *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
   *     OTHER DEALINGS IN THE SOFTWARE.
   */
  &fec {
  	pinctrl-names = "default";
  	pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
  	phy-mode = "rgmii";
  	phy-reset-duration = <2>;
  	phy-reset-gpios = <&gpio4 15 0>;
  	status = "okay";
  };
  
  &iomuxc {
  	enet {
  		pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
  			fsl,pins = <
  				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
  				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
  				/* AR8035 reset */
  				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x130b0
  				/* AR8035 interrupt */
  				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x80000000
  				/* GPIO16 -> AR8035 25MHz */
  				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0xc0000000
  				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x80000000
  				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
  				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
  				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
  				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
  				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
  				/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
  				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1
  				/* AR8035 pin strapping: IO voltage: pull up */
  				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
  				/* AR8035 pin strapping: PHYADDR#0: pull down */
  				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030
  				/* AR8035 pin strapping: PHYADDR#1: pull down */
  				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
  				/* AR8035 pin strapping: MODE#1: pull up */
  				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
  				/* AR8035 pin strapping: MODE#3: pull up */
  				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
  				/* AR8035 pin strapping: MODE#0: pull down */
  				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030
  
  				/*
  				 * As the RMII pins are also connected to RGMII
  				 * so that an AR8030 can be placed, set these
  				 * to high-z with the same pulls as above.
  				 * Use the GPIO settings to avoid changing the
  				 * input select registers.
  				 */
  				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x03000
  				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x03000
  				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x03000
  			>;
  		};
  	};
  };