Blame view

kernel/linux-rt-4.4.41/arch/m68k/include/asm/cacheflush_no.h 2.57 KB
5113f6f70   김현기   kernel add
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
  #ifndef _M68KNOMMU_CACHEFLUSH_H
  #define _M68KNOMMU_CACHEFLUSH_H
  
  /*
   * (C) Copyright 2000-2010, Greg Ungerer <gerg@snapgear.com>
   */
  #include <linux/mm.h>
  #include <asm/mcfsim.h>
  
  #define flush_cache_all()			__flush_cache_all()
  #define flush_cache_mm(mm)			do { } while (0)
  #define flush_cache_dup_mm(mm)			do { } while (0)
  #define flush_cache_range(vma, start, end)	do { } while (0)
  #define flush_cache_page(vma, vmaddr)		do { } while (0)
  #define flush_dcache_range(start, len)		__flush_dcache_all()
  #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
  #define flush_dcache_page(page)			do { } while (0)
  #define flush_dcache_mmap_lock(mapping)		do { } while (0)
  #define flush_dcache_mmap_unlock(mapping)	do { } while (0)
  #define flush_icache_range(start, len)		__flush_icache_all()
  #define flush_icache_page(vma,pg)		do { } while (0)
  #define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
  #define flush_cache_vmap(start, end)		do { } while (0)
  #define flush_cache_vunmap(start, end)		do { } while (0)
  
  #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
  	memcpy(dst, src, len)
  #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
  	memcpy(dst, src, len)
  
  void mcf_cache_push(void);
  
  static inline void __clear_cache_all(void)
  {
  #ifdef CACHE_INVALIDATE
  	__asm__ __volatile__ (
  		"movec	%0, %%CACR
  \t"
  		"nop
  \t"
  		: : "r" (CACHE_INVALIDATE) );
  #endif
  }
  
  static inline void __flush_cache_all(void)
  {
  #ifdef CACHE_PUSH
  	mcf_cache_push();
  #endif
  	__clear_cache_all();
  }
  
  /*
   * Some ColdFire parts implement separate instruction and data caches,
   * on those we should just flush the appropriate cache. If we don't need
   * to do any specific flushing then this will be optimized away.
   */
  static inline void __flush_icache_all(void)
  {
  #ifdef CACHE_INVALIDATEI
  	__asm__ __volatile__ (
  		"movec	%0, %%CACR
  \t"
  		"nop
  \t"
  		: : "r" (CACHE_INVALIDATEI) );
  #endif
  }
  
  static inline void __flush_dcache_all(void)
  {
  #ifdef CACHE_PUSH
  	mcf_cache_push();
  #endif
  #ifdef CACHE_INVALIDATED
  	__asm__ __volatile__ (
  		"movec	%0, %%CACR
  \t"
  		"nop
  \t"
  		: : "r" (CACHE_INVALIDATED) );
  #else
  	/* Flush the write buffer */
  	__asm__ __volatile__ ( "nop" );
  #endif
  }
  
  /*
   * Push cache entries at supplied address. We want to write back any dirty
   * data and then invalidate the cache lines associated with this address.
   */
  static inline void cache_push(unsigned long paddr, int len)
  {
  	__flush_cache_all();
  }
  
  /*
   * Clear cache entries at supplied address (that is don't write back any
   * dirty data).
   */
  static inline void cache_clear(unsigned long paddr, int len)
  {
  	__clear_cache_all();
  }
  
  #endif /* _M68KNOMMU_CACHEFLUSH_H */