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kernel/linux-rt-4.4.41/arch/arm64/mm/proc-macros.S 2.1 KB
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  /*
   * Based on arch/arm/mm/proc-macros.S
   *
   * Copyright (C) 2012 ARM Ltd.
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License version 2 as
   * published by the Free Software Foundation.
   *
   * This program is distributed in the hope that it will be useful,
   * but WITHOUT ANY WARRANTY; without even the implied warranty of
   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   * GNU General Public License for more details.
   *
   * You should have received a copy of the GNU General Public License
   * along with this program.  If not, see <http://www.gnu.org/licenses/>.
   */
  
  #include <asm/asm-offsets.h>
  #include <asm/thread_info.h>
  
  /*
   * vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm)
   */
  	.macro	vma_vm_mm, rd, rn
  	ldr	\rd, [\rn, #VMA_VM_MM]
  	.endm
  
  /*
   * mmid - get context id from mm pointer (mm->context.id)
   */
  	.macro	mmid, rd, rn
  	ldr	\rd, [\rn, #MM_CONTEXT_ID]
  	.endm
  
  /*
   * dcache_line_size - get the minimum D-cache line size from the CTR register.
   */
  	.macro	dcache_line_size, reg, tmp
  	mrs	\tmp, ctr_el0			// read CTR
  	ubfm	\tmp, \tmp, #16, #19		// cache line size encoding
  	mov	\reg, #4			// bytes per word
  	lsl	\reg, \reg, \tmp		// actual cache line size
  	.endm
  
  /*
   * icache_line_size - get the minimum I-cache line size from the CTR register.
   */
  	.macro	icache_line_size, reg, tmp
  	mrs	\tmp, ctr_el0			// read CTR
  	and	\tmp, \tmp, #0xf		// cache line size encoding
  	mov	\reg, #4			// bytes per word
  	lsl	\reg, \reg, \tmp		// actual cache line size
  	.endm
  
  /*
   * tcr_set_idmap_t0sz - update TCR.T0SZ so that we can load the ID map
   */
  	.macro	tcr_set_idmap_t0sz, valreg, tmpreg
  #ifndef CONFIG_ARM64_VA_BITS_48
  	ldr_l	\tmpreg, idmap_t0sz
  	bfi	\valreg, \tmpreg, #TCR_T0SZ_OFFSET, #TCR_TxSZ_WIDTH
  #endif
  	.endm
  
  /*
   * reset_pmuserenr_el0 - reset PMUSERENR_EL0 if PMUv3 present
   */
  	.macro	reset_pmuserenr_el0, tmpreg
  	mrs	\tmpreg, id_aa64dfr0_el1	// Check ID_AA64DFR0_EL1 PMUVer
  	sbfx	\tmpreg, \tmpreg, #8, #4
  	cmp	\tmpreg, #1			// Skip if no PMU present
  	b.lt	9000f
  	msr	pmuserenr_el0, xzr		// Disable PMU access from EL0
  9000:
  	.endm