Blame view

kernel/linux-rt-4.4.41/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.c 1.53 KB
5113f6f70   김현기   kernel add
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
  /*
   * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
   *
   * Permission is hereby granted, free of charge, to any person obtaining a
   * copy of this software and associated documentation files (the "Software"),
   * to deal in the Software without restriction, including without limitation
   * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   * and/or sell copies of the Software, and to permit persons to whom the
   * Software is furnished to do so, subject to the following conditions:
   *
   * The above copyright notice and this permission notice shall be included in
   * all copies or substantial portions of the Software.
   *
   * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
   * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
   * DEALINGS IN THE SOFTWARE.
   */
  #include "gf100.h"
  
  static const struct nvkm_bar_func
  gk20a_bar_func = {
  	.dtor = gf100_bar_dtor,
  	.oneinit = gf100_bar_oneinit,
  	.init = gf100_bar_init,
  	.umap = gf100_bar_umap,
  	.flush = g84_bar_flush,
  };
  
  int
  gk20a_bar_new(struct nvkm_device *device, int index, struct nvkm_bar **pbar)
  {
  	int ret = gf100_bar_new_(&gk20a_bar_func, device, index, pbar);
  	if (ret == 0)
  		(*pbar)->iomap_uncached = true;
  	return ret;
  }