Blame view

kernel/linux-rt-4.4.41/arch/sparc/include/asm/cacheflush_64.h 2.52 KB
5113f6f70   김현기   kernel add
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
  #ifndef _SPARC64_CACHEFLUSH_H
  #define _SPARC64_CACHEFLUSH_H
  
  #include <asm/page.h>
  
  #ifndef __ASSEMBLY__
  
  #include <linux/mm.h>
  
  /* Cache flush operations. */
  #define flushw_all()	__asm__ __volatile__("flushw")
  
  void __flushw_user(void);
  #define flushw_user() __flushw_user()
  
  #define flush_user_windows flushw_user
  #define flush_register_windows flushw_all
  
  /* These are the same regardless of whether this is an SMP kernel or not. */
  #define flush_cache_mm(__mm) \
  	do { if ((__mm) == current->mm) flushw_user(); } while(0)
  #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
  #define flush_cache_range(vma, start, end) \
  	flush_cache_mm((vma)->vm_mm)
  #define flush_cache_page(vma, page, pfn) \
  	flush_cache_mm((vma)->vm_mm)
  
  /*
   * On spitfire, the icache doesn't snoop local stores and we don't
   * use block commit stores (which invalidate icache lines) during
   * module load, so we need this.
   */
  void flush_icache_range(unsigned long start, unsigned long end);
  void __flush_icache_page(unsigned long);
  
  void __flush_dcache_page(void *addr, int flush_icache);
  void flush_dcache_page_impl(struct page *page);
  #ifdef CONFIG_SMP
  void smp_flush_dcache_page_impl(struct page *page, int cpu);
  void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
  #else
  #define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
  #define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
  #endif
  
  void __flush_dcache_range(unsigned long start, unsigned long end);
  #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
  void flush_dcache_page(struct page *page);
  
  #define flush_icache_page(vma, pg)	do { } while(0)
  #define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
  
  void flush_ptrace_access(struct vm_area_struct *, struct page *,
  			 unsigned long uaddr, void *kaddr,
  			 unsigned long len, int write);
  
  #define copy_to_user_page(vma, page, vaddr, dst, src, len)		\
  	do {								\
  		flush_cache_page(vma, vaddr, page_to_pfn(page));	\
  		memcpy(dst, src, len);					\
  		flush_ptrace_access(vma, page, vaddr, src, len, 0);	\
  	} while (0)
  
  #define copy_from_user_page(vma, page, vaddr, dst, src, len) 		\
  	do {								\
  		flush_cache_page(vma, vaddr, page_to_pfn(page));	\
  		memcpy(dst, src, len);					\
  		flush_ptrace_access(vma, page, vaddr, dst, len, 1);	\
  	} while (0)
  
  #define flush_dcache_mmap_lock(mapping)		do { } while (0)
  #define flush_dcache_mmap_unlock(mapping)	do { } while (0)
  
  #define flush_cache_vmap(start, end)		do { } while (0)
  #define flush_cache_vunmap(start, end)		do { } while (0)
  
  #endif /* !__ASSEMBLY__ */
  
  #endif /* _SPARC64_CACHEFLUSH_H */