5113f6f70
 김현기
kernel add
|
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
|
/*
* Hexagon Virtual Machine TLB functions
*
* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
/*
* The Hexagon Virtual Machine conceals the real workings of
* the TLB, but there are one or two functions that need to
* be instantiated for it, differently from a native build.
*/
#include <linux/mm.h>
#include <asm/page.h>
#include <asm/hexagon_vm.h>
/*
* Initial VM implementation has only one map active at a time, with
* TLB purgings on changes. So either we're nuking the current map,
* or it's a no-op. This operation is messy on true SMPs where other
* processors must be induced to flush the copies in their local TLBs,
* but Hexagon thread-based virtual processors share the same MMU.
*/
void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end)
{
struct mm_struct *mm = vma->vm_mm;
if (mm->context.ptbase == current->active_mm->context.ptbase)
__vmclrmap((void *)start, end - start);
}
/*
* Flush a page from the kernel virtual map - used by highmem
*/
void flush_tlb_one(unsigned long vaddr)
{
__vmclrmap((void *)vaddr, PAGE_SIZE);
}
/*
* Flush all TLBs across all CPUs, virtual or real.
* A single Hexagon core has 6 thread contexts but
* only one TLB.
*/
void tlb_flush_all(void)
{
/* should probably use that fixaddr end or whateve label */
__vmclrmap(0, 0xffff0000);
}
/*
* Flush TLB entries associated with a given mm_struct mapping.
*/
void flush_tlb_mm(struct mm_struct *mm)
{
/* Current Virtual Machine has only one map active at a time */
if (current->active_mm->context.ptbase == mm->context.ptbase)
tlb_flush_all();
}
/*
* Flush TLB state associated with a page of a vma.
*/
void flush_tlb_page(struct vm_area_struct *vma, unsigned long vaddr)
{
struct mm_struct *mm = vma->vm_mm;
if (mm->context.ptbase == current->active_mm->context.ptbase)
__vmclrmap((void *)vaddr, PAGE_SIZE);
}
/*
* Flush TLB entries associated with a kernel address range.
* Like flush range, but without the check on the vma->vm_mm.
*/
void flush_tlb_kernel_range(unsigned long start, unsigned long end)
{
__vmclrmap((void *)start, end - start);
}
|