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kernel/linux-rt-4.4.41/arch/arm64/include/asm/cache.h 1.31 KB
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  /*
   * Copyright (C) 2012 ARM Ltd.
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License version 2 as
   * published by the Free Software Foundation.
   *
   * This program is distributed in the hope that it will be useful,
   * but WITHOUT ANY WARRANTY; without even the implied warranty of
   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   * GNU General Public License for more details.
   *
   * You should have received a copy of the GNU General Public License
   * along with this program.  If not, see <http://www.gnu.org/licenses/>.
   */
  #ifndef __ASM_CACHE_H
  #define __ASM_CACHE_H
  
  #include <asm/cachetype.h>
  
  #define L1_CACHE_SHIFT		7
  #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
  
  /*
   * Memory returned by kmalloc() may be used for DMA, so we must make
   * sure that all such allocations are cache aligned. Otherwise,
   * unrelated code may cause parts of the buffer to be read into the
   * cache before the transfer is done, causing old data to be seen by
   * the CPU.
   */
  #define ARCH_DMA_MINALIGN	L1_CACHE_BYTES
  
  #ifndef __ASSEMBLY__
  
  #define __read_mostly __attribute__((__section__(".data..read_mostly")))
  
  static inline int cache_line_size(void)
  {
  	u32 cwg = cache_type_cwg();
  	return cwg ? 4 << cwg : L1_CACHE_BYTES;
  }
  
  #endif	/* __ASSEMBLY__ */
  
  #endif