diff --git a/bootloader/u-boot_2015_04/board/falinux/mx6s_prime_oven/mx6s_prime_oven.c b/bootloader/u-boot_2015_04/board/falinux/mx6s_prime_oven/mx6s_prime_oven.c index c448295..00c7110 100755 --- a/bootloader/u-boot_2015_04/board/falinux/mx6s_prime_oven/mx6s_prime_oven.c +++ b/bootloader/u-boot_2015_04/board/falinux/mx6s_prime_oven/mx6s_prime_oven.c @@ -387,18 +387,10 @@ static iomux_v3_cfg_t const backlight_pads[] = { // Dual LVDS static void enable_lvds(struct display_info_t const *dev) { - struct iomuxc *iomux = (struct iomuxc *) IOMUXC_BASE_ADDR; - u32 reg = readl(&iomux->gpr[2]); - - reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT; - writel(reg, &iomux->gpr[2]); - /* backlights off until needed */ imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); - gpio_direction_output(IMX_GPIO_NR(6, 7), 1); - - /* enable backlight PWM 1 */ + /* enable backlight PWM 1 */ if (pwm_init(0, 0, 0)) goto error; /* duty cycle 500ns, period: 3000ns */ @@ -406,6 +398,11 @@ static void enable_lvds(struct display_info_t const *dev) goto error; if (pwm_enable(0)) goto error; + + gpio_direction_output(IMX_GPIO_NR(6, 7), 0); + mdelay(100); + gpio_set_value(IMX_GPIO_NR(6, 7), 1); + return; error: @@ -425,10 +422,6 @@ static void enable_lvds_jeida(struct display_info_t const *dev) /* backlights off until needed */ imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); - gpio_direction_output(IMX_GPIO_NR(6, 7), 0); - mdelay(100); - gpio_set_value(IMX_GPIO_NR(6, 7), 1); - /* enable backlight PWM 1 */ if (pwm_init(0, 0, 0)) goto error; @@ -437,6 +430,11 @@ static void enable_lvds_jeida(struct display_info_t const *dev) goto error; if (pwm_enable(0)) goto error; + + gpio_direction_output(IMX_GPIO_NR(6, 7), 0); + mdelay(100); + gpio_set_value(IMX_GPIO_NR(6, 7), 1); + return; error: @@ -448,7 +446,7 @@ struct display_info_t const displays[] = { { .bus = -1, .addr = 0, - .pixfmt = IPU_PIX_FMT_RGB24, + .pixfmt = IPU_PIX_FMT_RGB666, // IPU_PIX_FMT_LVDS666 .detect = NULL, .enable = enable_lvds, .mode = { @@ -456,18 +454,14 @@ struct display_info_t const displays[] = { .refresh = 60, .xres = 1600, .yres = 900, - .pixclock = 10800, // ((1000000000 / (1600+44+24+24) * 1000) / (900+7+2+3)) / 60 = 10800 -// .pixclock = KHZ2PICOS(108000), // ((1000000000 / (1600+44+24+24) * 1000) / (900+7+2+3)) / 60 = 10800 - .left_margin = 44, // hsync back porch + .pixclock = 10800, // ((1000000000 / (1600+44+24+24) * 1000) / (900+7+2+3)) / 60 = 10800 + .left_margin = 54, // hsync back porch .right_margin = 24, // hsync front porch .upper_margin = 7, // vsync back porch .lower_margin = 2, // hsync fron porch .hsync_len = 24, .vsync_len = 3, -// .sync = 0, - .sync = FB_SYNC_HOR_HIGH_ACT | - FB_SYNC_VERT_HIGH_ACT | - FB_SYNC_EXT, + .sync = FB_SYNC_EXT, .vmode = FB_VMODE_NONINTERLACED } } @@ -488,7 +482,8 @@ static void setup_display(void) /* IPU1 D0 clock is 227.5 / 3.5 = 65MHz */ reg = readl(&mxc_ccm->cscmr2); - reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV; + reg &= ~(MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV); // divide by 3.5 +// reg |= (MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV); // divide by 7 writel(reg, &mxc_ccm->cscmr2); /* Set LDB_DI0, LDB_DI1 as clock source for IPU_DI0, IPU_DI1 */ @@ -516,9 +511,9 @@ static void setup_display(void) |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG - |IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT + |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG - |IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT + |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |IOMUXC_GPR2_SPLIT_MODE_EN_MASK |IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0 |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; @@ -529,7 +524,6 @@ static void setup_display(void) | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET) | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET); writel(reg, &iomux->gpr[3]); - } #endif @@ -637,5 +631,5 @@ int misc_init_r(void) #endif setenv_hex("reset_cause", get_imx_reset_cause()); - return 0; + return 0; } diff --git a/bootloader/u-boot_2015_04/drivers/video/ipu_disp.c b/bootloader/u-boot_2015_04/drivers/video/ipu_disp.c index 4faeafb..c276077 100644 --- a/bootloader/u-boot_2015_04/drivers/video/ipu_disp.c +++ b/bootloader/u-boot_2015_04/drivers/video/ipu_disp.c @@ -887,15 +887,15 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, } clk_set_parent(g_pixel_clk[disp], g_ldb_clk); } else { - if (clk_get_usecount(g_pixel_clk[disp]) != 0) + if (clk_get_usecount(g_pixel_clk[disp]) != 0) { clk_set_parent(g_pixel_clk[disp], g_ipu_clk); + } } rounded_pixel_clk = clk_round_rate(g_pixel_clk[disp], pixel_clk); clk_set_rate(g_pixel_clk[disp], rounded_pixel_clk); udelay(5000); /* Get integer portion of divider */ - div = clk_get_rate(clk_get_parent(g_pixel_clk[disp])) / - rounded_pixel_clk; + div = clk_get_rate(clk_get_parent(g_pixel_clk[disp])) / rounded_pixel_clk; ipu_di_data_wave_config(disp, SYNC_WAVE, div - 1, div - 1); ipu_di_data_pin_config(disp, SYNC_WAVE, DI_PIN15, 3, 0, div * 2); diff --git a/bootloader/u-boot_2015_04/drivers/video/mxc_ipuv3_fb.c b/bootloader/u-boot_2015_04/drivers/video/mxc_ipuv3_fb.c index c9f4aff..1fa9531 100644 --- a/bootloader/u-boot_2015_04/drivers/video/mxc_ipuv3_fb.c +++ b/bootloader/u-boot_2015_04/drivers/video/mxc_ipuv3_fb.c @@ -259,7 +259,6 @@ static int mxcfb_set_par(struct fb_info *fbi) sig_cfg.clkidle_en = 1; debug("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL); - printf("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL); if (ipu_init_sync_panel(mxc_fbi->ipu_di, (PICOS2KHZ(fbi->var.pixclock)) * 1000UL, diff --git a/kernel/linux-imx6_3.14.28/arch/arm/boot/dts/imx6qdl-prime-oven.dtsi b/kernel/linux-imx6_3.14.28/arch/arm/boot/dts/imx6qdl-prime-oven.dtsi index 2b900db..7612c9d 100755 --- a/kernel/linux-imx6_3.14.28/arch/arm/boot/dts/imx6qdl-prime-oven.dtsi +++ b/kernel/linux-imx6_3.14.28/arch/arm/boot/dts/imx6qdl-prime-oven.dtsi @@ -410,10 +410,10 @@ display-timings { native-mode = <&timing0>; timing0: LDB-LP133WD2 { - clock-frequency = <96870000>; /* 48870000 */ + clock-frequency = <92592000>; /* 48870000 96870000*/ hactive = <1600>; vactive = <900>; - hback-porch = <44>; + hback-porch = <54>; hfront-porch = <24>; vback-porch = <7>; vfront-porch = <2>;