에프에이리눅스 / 1611_0007_prime_oven

Blame view

kernel/linux-imx6_3.14.28/arch/x86/boot/pm.c 3.01 KB
edit raw normal view history
6b13f685e   김민수   BSP 최초 추가 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
 
  /* -*- linux-c -*- ------------------------------------------------------- *
   *
   *   Copyright (C) 1991, 1992 Linus Torvalds
   *   Copyright 2007 rPath, Inc. - All Rights Reserved
   *
   *   This file is part of the Linux kernel, and is made available under
   *   the terms of the GNU General Public License version 2.
   *
   * ----------------------------------------------------------------------- */
  
  /*
   * Prepare the machine for transition to protected mode.
   */
  
  #include "boot.h"
  #include <asm/segment.h>
  
  /*
   * Invoke the realmode switch hook if present; otherwise
   * disable all interrupts.
   */
  static void realmode_switch_hook(void)
  {
  	if (boot_params.hdr.realmode_swtch) {
  		asm volatile("lcallw *%0"
  			     : : "m" (boot_params.hdr.realmode_swtch)
  			     : "eax", "ebx", "ecx", "edx");
  	} else {
  		asm volatile("cli");
  		outb(0x80, 0x70); /* Disable NMI */
  		io_delay();
  	}
  }
  
  /*
   * Disable all interrupts at the legacy PIC.
   */
  static void mask_all_interrupts(void)
  {
  	outb(0xff, 0xa1);	/* Mask all interrupts on the secondary PIC */
  	io_delay();
  	outb(0xfb, 0x21);	/* Mask all but cascade on the primary PIC */
  	io_delay();
  }
  
  /*
   * Reset IGNNE# if asserted in the FPU.
   */
  static void reset_coprocessor(void)
  {
  	outb(0, 0xf0);
  	io_delay();
  	outb(0, 0xf1);
  	io_delay();
  }
  
  /*
   * Set up the GDT
   */
  
  struct gdt_ptr {
  	u16 len;
  	u32 ptr;
  } __attribute__((packed));
  
  static void setup_gdt(void)
  {
  	/* There are machines which are known to not boot with the GDT
  	   being 8-byte unaligned.  Intel recommends 16 byte alignment. */
  	static const u64 boot_gdt[] __attribute__((aligned(16))) = {
  		/* CS: code, read/execute, 4 GB, base 0 */
  		[GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
  		/* DS: data, read/write, 4 GB, base 0 */
  		[GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
  		/* TSS: 32-bit tss, 104 bytes, base 4096 */
  		/* We only have a TSS here to keep Intel VT happy;
  		   we don't actually use it for anything. */
  		[GDT_ENTRY_BOOT_TSS] = GDT_ENTRY(0x0089, 4096, 103),
  	};
  	/* Xen HVM incorrectly stores a pointer to the gdt_ptr, instead
  	   of the gdt_ptr contents.  Thus, make it static so it will
  	   stay in memory, at least long enough that we switch to the
  	   proper kernel GDT. */
  	static struct gdt_ptr gdt;
  
  	gdt.len = sizeof(boot_gdt)-1;
  	gdt.ptr = (u32)&boot_gdt + (ds() << 4);
  
  	asm volatile("lgdtl %0" : : "m" (gdt));
  }
  
  /*
   * Set up the IDT
   */
  static void setup_idt(void)
  {
  	static const struct gdt_ptr null_idt = {0, 0};
  	asm volatile("lidtl %0" : : "m" (null_idt));
  }
  
  /*
   * Actual invocation sequence
   */
  void go_to_protected_mode(void)
  {
  	/* Hook before leaving real mode, also disables interrupts */
  	realmode_switch_hook();
  
  	/* Enable the A20 gate */
  	if (enable_a20()) {
  		puts("A20 gate not responding, unable to boot...
  ");
  		die();
  	}
  
  	/* Reset coprocessor (IGNNE#) */
  	reset_coprocessor();
  
  	/* Mask all interrupts in the PIC */
  	mask_all_interrupts();
  
  	/* Actual transition to protected mode... */
  	setup_idt();
  	setup_gdt();
  	protected_mode_jump(boot_params.hdr.code32_start,
  			    (u32)&boot_params + (ds() << 4));
  }