6b13f685e
 김민수
BSP 최초 추가
|
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
|
/*
* MPSC/UART driver for the Marvell mv64360, mv64460, ...
*
* Author: Mark A. Greer <mgreer@mvista.com>
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <stdarg.h>
#include <stddef.h>
#include "types.h"
#include "string.h"
#include "stdio.h"
#include "io.h"
#include "ops.h"
#define MPSC_CHR_1 0x000c
#define MPSC_CHR_2 0x0010
#define MPSC_CHR_2_TA (1<<7)
#define MPSC_CHR_2_TCS (1<<9)
#define MPSC_CHR_2_RA (1<<23)
#define MPSC_CHR_2_CRD (1<<25)
#define MPSC_CHR_2_EH (1<<31)
#define MPSC_CHR_4 0x0018
#define MPSC_CHR_4_Z (1<<29)
#define MPSC_CHR_5 0x001c
#define MPSC_CHR_5_CTL1_INTR (1<<12)
#define MPSC_CHR_5_CTL1_VALID (1<<15)
#define MPSC_CHR_10 0x0030
#define MPSC_INTR_CAUSE 0x0000
#define MPSC_INTR_CAUSE_RCC (1<<6)
#define MPSC_INTR_MASK 0x0080
#define SDMA_SDCM 0x0008
#define SDMA_SDCM_AR (1<<15)
#define SDMA_SDCM_AT (1<<31)
static volatile char *mpsc_base;
static volatile char *mpscintr_base;
static u32 chr1, chr2;
static int mpsc_open(void)
{
chr1 = in_le32((u32 *)(mpsc_base + MPSC_CHR_1)) & 0x00ff0000;
chr2 = in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & ~(MPSC_CHR_2_TA
| MPSC_CHR_2_TCS | MPSC_CHR_2_RA | MPSC_CHR_2_CRD
| MPSC_CHR_2_EH);
out_le32((u32 *)(mpsc_base + MPSC_CHR_4), MPSC_CHR_4_Z);
out_le32((u32 *)(mpsc_base + MPSC_CHR_5),
MPSC_CHR_5_CTL1_INTR | MPSC_CHR_5_CTL1_VALID);
out_le32((u32 *)(mpsc_base + MPSC_CHR_2), chr2 | MPSC_CHR_2_EH);
return 0;
}
static void mpsc_putc(unsigned char c)
{
while (in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & MPSC_CHR_2_TCS);
out_le32((u32 *)(mpsc_base + MPSC_CHR_1), chr1 | c);
out_le32((u32 *)(mpsc_base + MPSC_CHR_2), chr2 | MPSC_CHR_2_TCS);
}
static unsigned char mpsc_getc(void)
{
u32 cause = 0;
unsigned char c;
while (!(cause & MPSC_INTR_CAUSE_RCC))
cause = in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE));
c = in_8((u8 *)(mpsc_base + MPSC_CHR_10 + 2));
out_8((u8 *)(mpsc_base + MPSC_CHR_10 + 2), c);
out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE),
cause & ~MPSC_INTR_CAUSE_RCC);
return c;
}
static u8 mpsc_tstc(void)
{
return (u8)((in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE))
& MPSC_INTR_CAUSE_RCC) != 0);
}
static void mpsc_stop_dma(volatile char *sdma_base)
{
out_le32((u32 *)(mpsc_base + MPSC_CHR_2),MPSC_CHR_2_TA | MPSC_CHR_2_RA);
out_le32((u32 *)(sdma_base + SDMA_SDCM), SDMA_SDCM_AR | SDMA_SDCM_AT);
while ((in_le32((u32 *)(sdma_base + SDMA_SDCM))
& (SDMA_SDCM_AR | SDMA_SDCM_AT)) != 0)
udelay(100);
}
static volatile char *mpsc_get_virtreg_of_phandle(void *devp, char *prop)
{
void *v;
int n;
n = getprop(devp, prop, &v, sizeof(v));
if (n != sizeof(v))
goto err_out;
devp = find_node_by_linuxphandle((u32)v);
if (devp == NULL)
goto err_out;
n = getprop(devp, "virtual-reg", &v, sizeof(v));
if (n == sizeof(v))
return v;
err_out:
return NULL;
}
int mpsc_console_init(void *devp, struct serial_console_data *scdp)
{
void *v;
int n, reg_set;
volatile char *sdma_base;
n = getprop(devp, "virtual-reg", &v, sizeof(v));
if (n != sizeof(v))
goto err_out;
mpsc_base = v;
sdma_base = mpsc_get_virtreg_of_phandle(devp, "sdma");
if (sdma_base == NULL)
goto err_out;
mpscintr_base = mpsc_get_virtreg_of_phandle(devp, "mpscintr");
if (mpscintr_base == NULL)
goto err_out;
n = getprop(devp, "cell-index", &v, sizeof(v));
if (n != sizeof(v))
goto err_out;
reg_set = (int)v;
mpscintr_base += (reg_set == 0) ? 0x4 : 0xc;
/* Make sure the mpsc ctlrs are shutdown */
out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), 0);
out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), 0);
out_le32((u32 *)(mpscintr_base + MPSC_INTR_MASK), 0);
out_le32((u32 *)(mpscintr_base + MPSC_INTR_MASK), 0);
mpsc_stop_dma(sdma_base);
scdp->open = mpsc_open;
scdp->putc = mpsc_putc;
scdp->getc = mpsc_getc;
scdp->tstc = mpsc_tstc;
scdp->close = NULL;
return 0;
err_out:
return -1;
}
|