6b13f685e
 김민수
BSP 최초 추가
|
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
|
Summary
=======
This README is about U-Boot support for TI's ARM Cortex-A8 based OMAP3 [1]
family of SoCs. TI's OMAP3 SoC family contains an ARM Cortex-A8. Additionally,
some family members contain a TMS320C64x+ DSP and/or an Imagination SGX 2D/3D
graphics processor and various other standard peripherals.
Currently the following boards are supported:
* OMAP3530 BeagleBoard [2]
* Gumstix Overo [3]
* TI EVM [4]
* OpenPandora Ltd. Pandora [5]
* TI/Logic PD Zoom MDK [6]
* TI/Logic PD Zoom 2 [7]
* CompuLab Ltd. CM-T35 [8]
Toolchain
=========
While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile
with -march=armv5 to allow more compilers to work. For U-Boot code this has
no performance impact.
Build
=====
* BeagleBoard:
make omap3_beagle_config
make
* Gumstix Overo:
make omap3_overo_config
make
* TI EVM:
make omap3_evm_config
make
* Pandora:
make omap3_pandora_config
make
* Zoom MDK:
make omap3_zoom1_config
make
* Zoom 2:
make omap3_zoom2_config
make
* CM-T35:
make cm_t35_config
make
* BlueLYNX-X:
make omap3_mvblx_config
make
Custom commands
===============
To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot
for OMAP3 supports custom user command
nandecc hw/sw
To be compatible with NAND drivers using SW ECC (e.g. kernel code)
nandecc sw
enables SW ECC calculation. HW ECC enabled with
nandecc hw
is typically used to write 2nd stage bootloader (known as 'x-loader') which is
executed by OMAP3's boot rom and therefore has to be written with HW ECC.
For all other commands see
help
Interfaces
==========
gpio
----
To set a bit :
if (!gpio_request(N, "")) {
gpio_direction_output(N, 0);
gpio_set_value(N, 1);
}
To clear a bit :
if (!gpio_request(N, "")) {
gpio_direction_output(N, 0);
gpio_set_value(N, 0);
}
To read a bit :
if (!gpio_request(N, "")) {
gpio_direction_input(N);
val = gpio_get_value(N);
gpio_free(N);
}
if (val)
printf("GPIO N is set
");
else
printf("GPIO N is clear
");
dma
---
void omap3_dma_init(void)
Init the DMA module
int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
Read config of the channel
int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
Write config to the channel
int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
uint32_t sze)
Config source, destination and size of a transfer
int omap3_dma_wait_for_transfer(uint32_t chan)
Wait for a transfer to end - this hast to be called before a channel
or the data the channel transferd are used.
int omap3_dma_get_revision(uint32_t *minor, uint32_t *major)
Read silicon Revision of the DMA module
NAND
====
There are some OMAP3 devices out there with NAND attached. Due to the fact that
OMAP3 ROM code can only handle 1-bit hamming ECC for accessing first page
(place where SPL lives) we require this setup for u-boot at least when reading
the second progam within SPL. A lot of newer NAND chips however require more
than 1-bit ECC for the pages, some can live with 1-bit for the first page. To
handle this we can switch to another ECC algorithm after reading the payload
within SPL.
BCH8
----
To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
implementation for OMAP3 works for you so the u-boot version should also.
When you require the SPL to read with BCH8 there are two more configs to
change:
* CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
arch/arm/include/asm/arch-omap3/omap_gpmc.h)
* CONFIG_SYS_NAND_ECCSIZE must be 512
* CONFIG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
Acknowledgements
================
OMAP3 U-Boot is based on U-Boot tar ball [9] for BeagleBoard and EVM done by
several TI employees.
Links
=====
[1] OMAP3:
http://www.ti.com/omap3 (high volume) and
http://www.ti.com/omap35x (broad market)
[2] OMAP3530 BeagleBoard:
http://beagleboard.org/
[3] Gumstix Overo:
http://www.gumstix.net/Overo/
[4] TI EVM:
http://focus.ti.com/docs/toolsw/folders/print/tmdxevm3503.html
[5] OpenPandora Ltd. Pandora:
http://openpandora.org/
[6] TI/Logic PD Zoom MDK:
http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit
[7] TI/Logic PD Zoom 2
http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
[8] CompuLab Ltd. CM-T35:
http://www.compulab.co.il/t3530/html/t3530-cm-datasheet.htm
[9] TI OMAP3 U-Boot:
http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz
|