/*
   * OMAP36xx-specific clkops
   *
   * Copyright (C) 2010 Texas Instruments, Inc.
   * Copyright (C) 2010 Nokia Corporation
   *
   * Mike Turquette
   * Vijaykumar GN
   * Paul Walmsley
   *
   * Parts of this code are based on code written by
   * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,
   * Russell King
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License version 2 as
   * published by the Free Software Foundation.
   */
  #undef DEBUG
  
  #include <linux/kernel.h>
  #include <linux/clk.h>
  #include <linux/clk-provider.h>
  #include <linux/io.h>
  
  #include "clock.h"
  #include "clock36xx.h"
  #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
  
  /**
   * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering
   *         from HSDivider PWRDN problem Implements Errata ID: i556.
   * @clk: DPLL output struct clk
   *
   * 3630 only: dpll3_m3_ck, dpll4_m2_ck, dpll4_m3_ck, dpll4_m4_ck,
   * dpll4_m5_ck & dpll4_m6_ck dividers gets loaded with reset
   * valueafter their respective PWRDN bits are set.  Any dummy write
   * (Any other value different from the Read value) to the
   * corresponding CM_CLKSEL register will refresh the dividers.
   */
  int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
  {
  	struct clk_divider *parent;
  	struct clk_hw *parent_hw;
  	u32 dummy_v, orig_v;
  	struct clk_hw_omap *omap_clk = to_clk_hw_omap(clk);
  	int ret;
  
  	/* Clear PWRDN bit of HSDIVIDER */
  	ret = omap2_dflt_clk_enable(clk);
  
  	parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
  	parent = to_clk_divider(parent_hw);
  
  	/* Restore the dividers */
  	if (!ret) {
  		orig_v = omap2_clk_readl(omap_clk, parent->reg);
  		dummy_v = orig_v;
  
  		/* Write any other value different from the Read value */
  		dummy_v ^= (1 << parent->shift);
  		omap2_clk_writel(dummy_v, omap_clk, parent->reg);
  
  		/* Write the original divider */
  		omap2_clk_writel(orig_v, omap_clk, parent->reg);
  	}
  
  	return ret;
  }