Blame view

kernel/linux-imx6_3.14.28/drivers/dma/sh/shdma.h 1.98 KB
6b13f685e   김민수   BSP 최초 추가
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
  /*
   * Renesas SuperH DMA Engine support
   *
   * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
   * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
   *
   * This is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License as published by
   * the Free Software Foundation; either version 2 of the License, or
   * (at your option) any later version.
   *
   */
  #ifndef __DMA_SHDMA_H
  #define __DMA_SHDMA_H
  
  #include <linux/sh_dma.h>
  #include <linux/shdma-base.h>
  #include <linux/dmaengine.h>
  #include <linux/interrupt.h>
  #include <linux/list.h>
  
  #define SH_DMAE_MAX_CHANNELS 20
  #define SH_DMAE_TCR_MAX 0x00FFFFFF	/* 16MB */
  
  struct device;
  
  struct sh_dmae_chan {
  	struct shdma_chan shdma_chan;
  	const struct sh_dmae_slave_config *config; /* Slave DMA configuration */
  	int xmit_shift;			/* log_2(bytes_per_xfer) */
  	void __iomem *base;
  	char dev_id[16];		/* unique name per DMAC of channel */
  	int pm_error;
  	dma_addr_t slave_addr;
  };
  
  struct sh_dmae_device {
  	struct shdma_dev shdma_dev;
  	struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS];
  	const struct sh_dmae_pdata *pdata;
  	struct list_head node;
  	void __iomem *chan_reg;
  	void __iomem *dmars;
  	unsigned int chcr_offset;
  	u32 chcr_ie_bit;
  };
  
  struct sh_dmae_regs {
  	u32 sar; /* SAR / source address */
  	u32 dar; /* DAR / destination address */
  	u32 tcr; /* TCR / transfer count */
  };
  
  struct sh_dmae_desc {
  	struct sh_dmae_regs hw;
  	struct shdma_desc shdma_desc;
  };
  
  #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan)
  #define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
  #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
  #define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
  				     struct sh_dmae_device, shdma_dev.dma_dev)
  
  #ifdef CONFIG_SHDMA_R8A73A4
  extern const struct sh_dmae_pdata r8a73a4_dma_pdata;
  #define r8a73a4_shdma_devid (&r8a73a4_dma_pdata)
  #else
  #define r8a73a4_shdma_devid NULL
  #endif
  
  #endif	/* __DMA_SHDMA_H */