6b13f685e
김민수
BSP 최초 추가
|
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
|
#ifndef AM335X_FB_H
#define AM335X_FB_H
#define HSVS_CONTROL (0x01 << 25) /*
* 0 = lcd_lp and lcd_fp are driven on
* opposite edges of pixel clock than
* the lcd_pixel_o
* 1 = lcd_lp and lcd_fp are driven
* according to bit 24 Note that this
* bit MUST be set to '0' for Passive
* Matrix displays the edge timing is
* fixed
*/
#define HSVS_RISEFALL (0x01 << 24) /*
* 0 = lcd_lp and lcd_fp are driven on
* the rising edge of pixel clock (bit
* 25 must be set to 1)
* 1 = lcd_lp and lcd_fp are driven on
* the falling edge of pixel clock (bit
* 25 must be set to 1)
*/
#define DE_INVERT (0x01 << 23) /*
* 0 = DE is low-active
* 1 = DE is high-active
*/
#define PXCLK_INVERT (0x01 << 22) /*
* 0 = pix-clk is high-active
* 1 = pic-clk is low-active
*/
#define HSYNC_INVERT (0x01 << 21) /*
* 0 = HSYNC is active high
* 1 = HSYNC is avtive low
*/
#define VSYNC_INVERT (0x01 << 20) /*
* 0 = VSYNC is active high
* 1 = VSYNC is active low
*/
struct am335x_lcdpanel {
unsigned int hactive;
unsigned int vactive;
unsigned int bpp;
unsigned int hfp;
unsigned int hbp;
unsigned int hsw;
unsigned int vfp;
unsigned int vbp;
unsigned int vsw;
unsigned int pxl_clk_div;
unsigned int pol;
unsigned int pup_delay;
unsigned int pon_delay;
void (*panel_power_ctrl)(int);
};
int am335xfb_init(struct am335x_lcdpanel *panel);
#endif /* AM335X_FB_H */
|