Blame view

bootloader/u-boot_2015_04/drivers/qe/fdt.c 1.68 KB
6b13f685e   김민수   BSP 최초 추가
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
  /*
   * Copyright 2008 Freescale Semiconductor, Inc.
   *
   * (C) Copyright 2000
   * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   *
   * SPDX-License-Identifier:	GPL-2.0+
   */
  
  #include <common.h>
  #include <libfdt.h>
  #include <fdt_support.h>
  #include "qe.h"
  
  #ifdef CONFIG_QE
  DECLARE_GLOBAL_DATA_PTR;
  
  /*
   * If a QE firmware has been uploaded, then add the 'firmware' node under
   * the 'qe' node.
   */
  void fdt_fixup_qe_firmware(void *blob)
  {
  	struct qe_firmware_info *qe_fw_info;
  	int node, ret;
  
  	qe_fw_info = qe_get_firmware_info();
  	if (!qe_fw_info)
  		return;
  
  	node = fdt_path_offset(blob, "/qe");
  	if (node < 0)
  		return;
  
  	/* We assume the node doesn't exist yet */
  	node = fdt_add_subnode(blob, node, "firmware");
  	if (node < 0)
  		return;
  
  	ret = fdt_setprop(blob, node, "extended-modes",
  		&qe_fw_info->extended_modes, sizeof(u64));
  	if (ret < 0)
  		goto error;
  
  	ret = fdt_setprop_string(blob, node, "id", qe_fw_info->id);
  	if (ret < 0)
  		goto error;
  
  	ret = fdt_setprop(blob, node, "virtual-traps", qe_fw_info->vtraps,
  		sizeof(qe_fw_info->vtraps));
  	if (ret < 0)
  		goto error;
  
  	return;
  
  error:
  	fdt_del_node(blob, node);
  }
  
  void ft_qe_setup(void *blob)
  {
  	do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
  		"bus-frequency", gd->arch.qe_clk, 1);
  	do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
  		"brg-frequency", gd->arch.brg_clk, 1);
  	do_fixup_by_compat_u32(blob, "fsl,qe",
  		"clock-frequency", gd->arch.qe_clk, 1);
  	do_fixup_by_compat_u32(blob, "fsl,qe",
  		"bus-frequency", gd->arch.qe_clk, 1);
  	do_fixup_by_compat_u32(blob, "fsl,qe",
  		"brg-frequency", gd->arch.brg_clk, 1);
  	do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
  		"clock-frequency", gd->arch.qe_clk / 2, 1);
  	fdt_fixup_qe_firmware(blob);
  }
  #endif