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bootloader/u-boot_2015_04/board/aristainetos/clocks.cfg 667 Bytes
6b13f685e   김민수   BSP 최초 추가
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  /*
   * Copyright (C) 2013 Boundary Devices
   *
   * SPDX-License-Identifier:	GPL-2.0+
   *
   * Device Configuration Data (DCD)
   *
   * Each entry must have the format:
   * Addr-type           Address        Value
   *
   * where:
   *      Addr-type register length (1,2 or 4 bytes)
   *      Address   absolute address of the register
   *      value     value to be stored in the register
   */
  
  /* set the default clock gate to save power */
  DATA 4, CCM_CCGR0, 0x00c03f3f
  DATA 4, CCM_CCGR1, 0x0030fcff
  DATA 4, CCM_CCGR2, 0x0fffcfc0
  DATA 4, CCM_CCGR3, 0x3ff0300f
  DATA 4, CCM_CCGR4, 0xfffff30c /* enable NAND/GPMI/BCH clocks */
  DATA 4, CCM_CCGR5, 0x0f0000c3
  DATA 4, CCM_CCGR6, 0x000003ff